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| author | Niklas Cassel <niklas.cassel@wdc.com> | 2023-06-09 16:08:41 +0200 |
|---|---|---|
| committer | John Snow <jsnow@redhat.com> | 2023-09-06 22:48:04 -0400 |
| commit | d73b84d0b664e60fffb66f46e84d0db4a8e1c713 (patch) | |
| tree | d2292d5fdd88faab9597ef46f8cbe54fde75a8f1 /hw/ide | |
| parent | e2a5d9b3d9c3d311618160603cc9bc04fbd98796 (diff) | |
| download | qemu-d73b84d0b664e60fffb66f46e84d0db4a8e1c713.zip qemu-d73b84d0b664e60fffb66f46e84d0db4a8e1c713.tar.gz qemu-d73b84d0b664e60fffb66f46e84d0db4a8e1c713.tar.bz2 | |
hw/ide/ahci: PxSACT and PxCI is cleared when PxCMD.ST is cleared
According to AHCI 1.3.1 definition of PxSACT:
This field is cleared when PxCMD.ST is written from a '1' to a '0' by
software. This field is not cleared by a COMRESET or a software reset.
According to AHCI 1.3.1 definition of PxCI:
This field is also cleared when PxCMD.ST is written from a '1' to a '0'
by software.
Clearing PxCMD.ST is part of the error recovery procedure, see
AHCI 1.3.1, section "6.2 Error Recovery".
If we don't clear PxCI on error recovery, the previous command will
incorrectly still be marked as pending after error recovery.
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230609140844.202795-6-nks@flawful.org
Signed-off-by: John Snow <jsnow@redhat.com>
Diffstat (limited to 'hw/ide')
| -rw-r--r-- | hw/ide/ahci.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 3deaf01..a31e6fa 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -329,6 +329,11 @@ static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val) ahci_check_irq(s); break; case AHCI_PORT_REG_CMD: + if ((pr->cmd & PORT_CMD_START) && !(val & PORT_CMD_START)) { + pr->scr_act = 0; + pr->cmd_issue = 0; + } + /* Block any Read-only fields from being set; * including LIST_ON and FIS_ON. * The spec requires to set ICC bits to zero after the ICC change |