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author | John Snow <jsnow@redhat.com> | 2017-09-18 15:01:26 -0400 |
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committer | John Snow <jsnow@redhat.com> | 2017-09-18 19:41:11 -0400 |
commit | 5fa0feecaa5c1e05b6bed0e9684b78ae15f0e755 (patch) | |
tree | c88be2deb976156b5b0e8850b06f2fef88468688 /hw/ide/trace-events | |
parent | e4baa9f00b9ddf47ac2811eb58a3931434b848f7 (diff) | |
download | qemu-5fa0feecaa5c1e05b6bed0e9684b78ae15f0e755.zip qemu-5fa0feecaa5c1e05b6bed0e9684b78ae15f0e755.tar.gz qemu-5fa0feecaa5c1e05b6bed0e9684b78ae15f0e755.tar.bz2 |
AHCI: Rework IRQ constants
Create a new enum so that we can name the IRQ bits, which will make debugging
them a little nicer if we can print them out. Not handled in this patch, but
this will make it possible to get a nice debug printf detailing exactly which
status bits are set, as it can be multiple at any given time.
As a consequence of this patch, it is no longer possible to set multiple IRQ
codes at once, but nothing was utilizing this ability anyway.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 20170901001502.29915-8-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
Diffstat (limited to 'hw/ide/trace-events')
-rw-r--r-- | hw/ide/trace-events | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ide/trace-events b/hw/ide/trace-events index 0b61c5d..e15fd77 100644 --- a/hw/ide/trace-events +++ b/hw/ide/trace-events @@ -62,7 +62,7 @@ ahci_port_read(void *s, int port, int offset, uint32_t ret) "ahci(%p)[%d]: port ahci_irq_raise(void *s) "ahci(%p): raise irq" ahci_irq_lower(void *s) "ahci(%p): lower irq" ahci_check_irq(void *s, uint32_t old, uint32_t new) "ahci(%p): check irq 0x%08x --> 0x%08x" - +ahci_trigger_irq(void *s, int port, const char *name, uint32_t val, uint32_t old, uint32_t new, uint32_t effective) "ahci(%p)[%d]: trigger irq +%s (0x%08x); irqstat: 0x%08x --> 0x%08x; effective: 0x%08x" ahci_port_write(void *s, int port, int offset, uint32_t val) "ahci(%p)[%d]: port write @ 0x%x: 0x%08x" ahci_mem_read_32(void *s, uint64_t addr, uint32_t val) "ahci(%p): mem read @ 0x%"PRIx64": 0x%08x" ahci_mem_read(void *s, unsigned size, uint64_t addr, uint64_t val) "ahci(%p): read%u @ 0x%"PRIx64": 0x%016"PRIx64 |