diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2021-01-08 19:51:57 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2021-01-12 21:19:02 +0000 |
commit | e4d51ac6921dc861bfb3d20e4c7dcf345840a9da (patch) | |
tree | c6ddb6d408f8eb89d697ce5a6b03b6b52a848902 /hw/ide/pci.c | |
parent | fa56cf7e86f99d5557a4fb730e375777b89d8b50 (diff) | |
download | qemu-e4d51ac6921dc861bfb3d20e4c7dcf345840a9da.zip qemu-e4d51ac6921dc861bfb3d20e4c7dcf345840a9da.tar.gz qemu-e4d51ac6921dc861bfb3d20e4c7dcf345840a9da.tar.bz2 |
target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns
In commit cd8be50e58f63413c0 we converted the A32 coprocessor
insns to decodetree. This accidentally broke XScale/iWMMXt insns,
because it moved the handling of "cp insns which are handled
by looking up the cp register in the hashtable" from after the
call to the legacy disas_xscale_insn() decode to before it,
with the result that all XScale/iWMMXt insns now UNDEF.
Update valid_cp() so that it knows that on XScale cp 0 and 1
are not standard coprocessor instructions; this will cause
the decodetree trans_ functions to ignore them, so that
execution will correctly get through to the legacy decode again.
Cc: qemu-stable@nongnu.org
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 20210108195157.32067-1-peter.maydell@linaro.org
Diffstat (limited to 'hw/ide/pci.c')
0 files changed, 0 insertions, 0 deletions