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authorPeter Maydell <peter.maydell@linaro.org>2014-12-15 16:43:42 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-12-15 16:43:42 +0000
commitdfa9c2a0f4d0a0c8b2c1449ecdbb1297427e1560 (patch)
tree8700fd36af5cff7e69f6648140b16cc1f8f2d6ae /hw/i386
parent54600752a1dd67844c2cf3c467db562c39499838 (diff)
parent224d10ff5aea9e74a1792fc21188bc9752c43ee9 (diff)
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
- Migration and linuxboot fixes for 2.2 regressions - valgrind/KVM support - small i386 patches - PCI SD host controller support - malloc/free cleanups from Markus (x86/scsi) - IvyBridge model - XSAVES support for KVM - initial patches from record/replay # gpg: Signature made Mon 15 Dec 2014 16:35:08 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (47 commits) sdhci: Support SDHCI devices on PCI sdhci: Define SDHCI PCI ids sdhci: Add "sysbus" to sdhci QOM types and methods sdhci: Remove class "virtual" methods sdhci: Set a default frequency clock serial: only resample THR interrupt on rising edge of IER.THRI serial: update LSR on enabling/disabling FIFOs serial: clean up THRE/TEMT handling serial: reset thri_pending on IER writes with THRI=0 linuxboot: fix loading old kernels kvm/apic: fix 2.2->2.1 migration target-i386: add Ivy Bridge CPU model target-i386: add f16c and rdrand to Haswell and Broadwell target-i386: add VME to all CPUs pc: add 2.3 machine types i386: do not cross the pages boundaries in replay mode cpus: make icount warp behave well with respect to stop/cont timer: introduce new QEMU_CLOCK_VIRTUAL_RT clock cpu-exec: invalidate nocache translation if they are interrupted icount: introduce cpu_get_icount_raw ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/i386')
-rw-r--r--hw/i386/kvm/apic.c10
-rw-r--r--hw/i386/kvm/clock.c3
-rw-r--r--hw/i386/kvm/i8254.c2
-rw-r--r--hw/i386/multiboot.c32
-rw-r--r--hw/i386/pc.c3
-rw-r--r--hw/i386/pc_piix.c47
-rw-r--r--hw/i386/pc_q35.c44
-rw-r--r--hw/i386/pc_sysfw.c4
8 files changed, 122 insertions, 23 deletions
diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
index 271e97f..5b47056 100644
--- a/hw/i386/kvm/apic.c
+++ b/hw/i386/kvm/apic.c
@@ -171,12 +171,15 @@ static const MemoryRegionOps kvm_apic_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static void kvm_apic_realize(DeviceState *dev, Error **errp)
+static void kvm_apic_reset(APICCommonState *s)
{
- APICCommonState *s = APIC_COMMON(dev);
-
/* Not used by KVM, which uses the CPU mp_state instead. */
s->wait_for_sipi = 0;
+}
+
+static void kvm_apic_realize(DeviceState *dev, Error **errp)
+{
+ APICCommonState *s = APIC_COMMON(dev);
memory_region_init_io(&s->io_memory, NULL, &kvm_apic_io_ops, s, "kvm-apic-msi",
APIC_SPACE_SIZE);
@@ -191,6 +194,7 @@ static void kvm_apic_class_init(ObjectClass *klass, void *data)
APICCommonClass *k = APIC_COMMON_CLASS(klass);
k->realize = kvm_apic_realize;
+ k->reset = kvm_apic_reset;
k->set_base = kvm_apic_set_base;
k->set_tpr = kvm_apic_set_tpr;
k->get_tpr = kvm_apic_get_tpr;
diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c
index 58be2bd..efdf165 100644
--- a/hw/i386/kvm/clock.c
+++ b/hw/i386/kvm/clock.c
@@ -88,7 +88,7 @@ static void kvmclock_vm_state_change(void *opaque, int running,
int ret;
if (running) {
- struct kvm_clock_data data;
+ struct kvm_clock_data data = {};
uint64_t time_at_migration = kvmclock_current_nsec(s);
s->clock_valid = false;
@@ -99,7 +99,6 @@ static void kvmclock_vm_state_change(void *opaque, int running,
}
data.clock = s->clock;
- data.flags = 0;
ret = kvm_vm_ioctl(kvm_state, KVM_SET_CLOCK, &data);
if (ret < 0) {
fprintf(stderr, "KVM_SET_CLOCK failed: %s\n", strerror(ret));
diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c
index 472af81..90eea10 100644
--- a/hw/i386/kvm/i8254.c
+++ b/hw/i386/kvm/i8254.c
@@ -138,7 +138,7 @@ static void kvm_pit_get(PITCommonState *pit)
static void kvm_pit_put(PITCommonState *pit)
{
KVMPITState *s = KVM_PIT(pit);
- struct kvm_pit_state2 kpit;
+ struct kvm_pit_state2 kpit = {};
struct kvm_pit_channel_state *kchan;
struct PITChannelState *sc;
int i, ret;
diff --git a/hw/i386/multiboot.c b/hw/i386/multiboot.c
index 985ca1e..f86d351 100644
--- a/hw/i386/multiboot.c
+++ b/hw/i386/multiboot.c
@@ -54,6 +54,7 @@ enum {
MBI_MODS_COUNT = 20,
MBI_MODS_ADDR = 24,
MBI_MMAP_ADDR = 48,
+ MBI_BOOTLOADER = 64,
MBI_SIZE = 88,
@@ -74,6 +75,7 @@ enum {
MULTIBOOT_FLAGS_CMDLINE = 1 << 2,
MULTIBOOT_FLAGS_MODULES = 1 << 3,
MULTIBOOT_FLAGS_MMAP = 1 << 6,
+ MULTIBOOT_FLAGS_BOOTLOADER = 1 << 9,
};
typedef struct {
@@ -87,6 +89,8 @@ typedef struct {
hwaddr offset_mbinfo;
/* offset in buffer for cmdlines in bytes */
hwaddr offset_cmdlines;
+ /* offset in buffer for bootloader name in bytes */
+ hwaddr offset_bootloader;
/* offset of modules in bytes */
hwaddr offset_mods;
/* available slots for mb modules infos */
@@ -95,6 +99,8 @@ typedef struct {
int mb_mods_count;
} MultibootState;
+const char *bootloader_name = "qemu";
+
static uint32_t mb_add_cmdline(MultibootState *s, const char *cmdline)
{
hwaddr p = s->offset_cmdlines;
@@ -105,6 +111,16 @@ static uint32_t mb_add_cmdline(MultibootState *s, const char *cmdline)
return s->mb_buf_phys + p;
}
+static uint32_t mb_add_bootloader(MultibootState *s, const char *bootloader)
+{
+ hwaddr p = s->offset_bootloader;
+ char *b = (char *)s->mb_buf + p;
+
+ memcpy(b, bootloader, strlen(bootloader) + 1);
+ s->offset_bootloader += strlen(b) + 1;
+ return s->mb_buf_phys + p;
+}
+
static void mb_add_mod(MultibootState *s,
hwaddr start, hwaddr end,
hwaddr cmdline_phys)
@@ -241,9 +257,10 @@ int load_multiboot(FWCfgState *fw_cfg,
mbs.mb_buf_size = TARGET_PAGE_ALIGN(mb_kernel_size);
mbs.offset_mbinfo = mbs.mb_buf_size;
- /* Calculate space for cmdlines and mb_mods */
+ /* Calculate space for cmdlines, bootloader name, and mb_mods */
mbs.mb_buf_size += strlen(kernel_filename) + 1;
mbs.mb_buf_size += strlen(kernel_cmdline) + 1;
+ mbs.mb_buf_size += strlen(bootloader_name) + 1;
if (initrd_filename) {
const char *r = initrd_filename;
mbs.mb_buf_size += strlen(r) + 1;
@@ -257,9 +274,11 @@ int load_multiboot(FWCfgState *fw_cfg,
mbs.mb_buf_size = TARGET_PAGE_ALIGN(mbs.mb_buf_size);
- /* enlarge mb_buf to hold cmdlines and mb-info structs */
- mbs.mb_buf = g_realloc(mbs.mb_buf, mbs.mb_buf_size);
- mbs.offset_cmdlines = mbs.offset_mbinfo + mbs.mb_mods_avail * MB_MOD_SIZE;
+ /* enlarge mb_buf to hold cmdlines, bootloader, mb-info structs */
+ mbs.mb_buf = g_realloc(mbs.mb_buf, mbs.mb_buf_size);
+ mbs.offset_cmdlines = mbs.offset_mbinfo + mbs.mb_mods_avail * MB_MOD_SIZE;
+ mbs.offset_bootloader = mbs.offset_cmdlines + strlen(kernel_filename) + 1
+ + strlen(kernel_cmdline) + 1;
if (initrd_filename) {
char *next_initrd, not_last;
@@ -306,6 +325,8 @@ int load_multiboot(FWCfgState *fw_cfg,
kernel_filename, kernel_cmdline);
stl_p(bootinfo + MBI_CMDLINE, mb_add_cmdline(&mbs, kcmdline));
+ stl_p(bootinfo + MBI_BOOTLOADER, mb_add_bootloader(&mbs, bootloader_name));
+
stl_p(bootinfo + MBI_MODS_ADDR, mbs.mb_buf_phys + mbs.offset_mbinfo);
stl_p(bootinfo + MBI_MODS_COUNT, mbs.mb_mods_count); /* mods_count */
@@ -314,7 +335,8 @@ int load_multiboot(FWCfgState *fw_cfg,
| MULTIBOOT_FLAGS_BOOT_DEVICE
| MULTIBOOT_FLAGS_CMDLINE
| MULTIBOOT_FLAGS_MODULES
- | MULTIBOOT_FLAGS_MMAP);
+ | MULTIBOOT_FLAGS_MMAP
+ | MULTIBOOT_FLAGS_BOOTLOADER);
stl_p(bootinfo + MBI_BOOT_DEVICE, 0x8000ffff); /* XXX: use the -boot switch? */
stl_p(bootinfo + MBI_MMAP_ADDR, ADDR_E820_MAP);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f31d55e..c0e55a6 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -602,8 +602,7 @@ int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
}
/* new "etc/e820" file -- include ram too */
- e820_table = g_realloc(e820_table,
- sizeof(struct e820_entry) * (e820_entries+1));
+ e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
e820_table[e820_entries].address = cpu_to_le64(address);
e820_table[e820_entries].length = cpu_to_le64(length);
e820_table[e820_entries].type = cpu_to_le32(type);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 85ed3c8..220f741 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -308,9 +308,33 @@ static void pc_init_pci(MachineState *machine)
pc_init1(machine, 1, 1);
}
+static void pc_compat_2_2(MachineState *machine)
+{
+ x86_cpu_compat_set_features("kvm64", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("kvm32", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Conroe", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Penryn", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Nehalem", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Westmere", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("SandyBridge", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G1", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G2", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G3", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G4", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G5", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_F16C);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
+}
+
static void pc_compat_2_1(MachineState *machine)
{
PCMachineState *pcms = PC_MACHINE(machine);
+
+ pc_compat_2_2(machine);
smbios_uuid_encoded = false;
x86_cpu_compat_set_features("coreduo", FEAT_1_ECX, CPUID_EXT_VMX, 0);
x86_cpu_compat_set_features("core2duo", FEAT_1_ECX, CPUID_EXT_VMX, 0);
@@ -385,6 +409,12 @@ static void pc_compat_1_2(MachineState *machine)
x86_cpu_compat_kvm_no_autoenable(FEAT_KVM, KVM_FEATURE_PV_EOI);
}
+static void pc_init_pci_2_2(MachineState *machine)
+{
+ pc_compat_2_2(machine);
+ pc_init_pci(machine);
+}
+
static void pc_init_pci_2_1(MachineState *machine)
{
pc_compat_2_1(machine);
@@ -478,19 +508,27 @@ static void pc_xen_hvm_init(MachineState *machine)
.desc = "Standard PC (i440FX + PIIX, 1996)", \
.hot_add_cpu = pc_hot_add_cpu
-#define PC_I440FX_2_2_MACHINE_OPTIONS \
+#define PC_I440FX_2_3_MACHINE_OPTIONS \
PC_I440FX_MACHINE_OPTIONS, \
.default_machine_opts = "firmware=bios-256k.bin", \
.default_display = "std"
-static QEMUMachine pc_i440fx_machine_v2_2 = {
- PC_I440FX_2_2_MACHINE_OPTIONS,
- .name = "pc-i440fx-2.2",
+static QEMUMachine pc_i440fx_machine_v2_3 = {
+ PC_I440FX_2_3_MACHINE_OPTIONS,
+ .name = "pc-i440fx-2.3",
.alias = "pc",
.init = pc_init_pci,
.is_default = 1,
};
+#define PC_I440FX_2_2_MACHINE_OPTIONS PC_I440FX_2_3_MACHINE_OPTIONS
+
+static QEMUMachine pc_i440fx_machine_v2_2 = {
+ PC_I440FX_2_2_MACHINE_OPTIONS,
+ .name = "pc-i440fx-2.2",
+ .init = pc_init_pci_2_2,
+};
+
#define PC_I440FX_2_1_MACHINE_OPTIONS \
PC_I440FX_MACHINE_OPTIONS, \
.default_machine_opts = "firmware=bios-256k.bin"
@@ -928,6 +966,7 @@ static QEMUMachine xenfv_machine = {
static void pc_machine_init(void)
{
+ qemu_register_pc_machine(&pc_i440fx_machine_v2_3);
qemu_register_pc_machine(&pc_i440fx_machine_v2_2);
qemu_register_pc_machine(&pc_i440fx_machine_v2_1);
qemu_register_pc_machine(&pc_i440fx_machine_v2_0);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 0262b5e..7ba0535 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -287,10 +287,33 @@ static void pc_q35_init(MachineState *machine)
}
}
+static void pc_compat_2_2(MachineState *machine)
+{
+ x86_cpu_compat_set_features("kvm64", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("kvm32", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Conroe", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Penryn", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Nehalem", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Westmere", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("SandyBridge", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G1", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G2", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G3", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G4", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Opteron_G5", FEAT_1_EDX, 0, CPUID_VME);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_F16C);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
+}
+
static void pc_compat_2_1(MachineState *machine)
{
PCMachineState *pcms = PC_MACHINE(machine);
+ pc_compat_2_2(machine);
pcms->enforce_aligned_dimm = false;
smbios_uuid_encoded = false;
x86_cpu_compat_set_features("coreduo", FEAT_1_ECX, CPUID_EXT_VMX, 0);
@@ -334,6 +357,12 @@ static void pc_compat_1_4(MachineState *machine)
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}
+static void pc_q35_init_2_2(MachineState *machine)
+{
+ pc_compat_2_2(machine);
+ pc_q35_init(machine);
+}
+
static void pc_q35_init_2_1(MachineState *machine)
{
pc_compat_2_1(machine);
@@ -377,16 +406,24 @@ static void pc_q35_init_1_4(MachineState *machine)
.hot_add_cpu = pc_hot_add_cpu, \
.units_per_default_bus = 1
-#define PC_Q35_2_2_MACHINE_OPTIONS \
+#define PC_Q35_2_3_MACHINE_OPTIONS \
PC_Q35_MACHINE_OPTIONS, \
.default_machine_opts = "firmware=bios-256k.bin", \
.default_display = "std"
+static QEMUMachine pc_q35_machine_v2_3 = {
+ PC_Q35_2_3_MACHINE_OPTIONS,
+ .name = "pc-q35-2.3",
+ .alias = "q35",
+ .init = pc_q35_init,
+};
+
+#define PC_Q35_2_2_MACHINE_OPTIONS PC_Q35_2_3_MACHINE_OPTIONS
+
static QEMUMachine pc_q35_machine_v2_2 = {
PC_Q35_2_2_MACHINE_OPTIONS,
.name = "pc-q35-2.2",
- .alias = "q35",
- .init = pc_q35_init,
+ .init = pc_q35_init_2_2,
};
#define PC_Q35_2_1_MACHINE_OPTIONS \
@@ -465,6 +502,7 @@ static QEMUMachine pc_q35_machine_v1_4 = {
static void pc_q35_machine_init(void)
{
+ qemu_register_pc_machine(&pc_q35_machine_v2_3);
qemu_register_pc_machine(&pc_q35_machine_v2_2);
qemu_register_pc_machine(&pc_q35_machine_v2_1);
qemu_register_pc_machine(&pc_q35_machine_v2_0);
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 75913c5..662d997 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -204,9 +204,7 @@ static void old_pc_system_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw)
fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
exit(1);
}
- if (filename) {
- g_free(filename);
- }
+ g_free(filename);
/* map the last 128KB of the BIOS in ISA space */
isa_bios_size = bios_size;