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| author | Gerd Hoffmann <kraxel@redhat.com> | 2020-06-19 11:19:02 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2020-06-24 17:18:28 -0400 |
| commit | d23f78349fd8048e137cc96f99cb56110212bfe5 (patch) | |
| tree | 68cfa237bae4109fe36743e9bb62ace4fd75f37f /hw/i386 | |
| parent | 13371f9bf44c294b0cbc58f10c21fa0c82a2c7d8 (diff) | |
| download | qemu-d23f78349fd8048e137cc96f99cb56110212bfe5.zip qemu-d23f78349fd8048e137cc96f99cb56110212bfe5.tar.gz qemu-d23f78349fd8048e137cc96f99cb56110212bfe5.tar.bz2 | |
acpi: drop serial/parallel enable bits from dsdt
The _STA methods for COM+LPT used to reference them,
but that isn't the case any more.
piix4 DSDT changes:
Scope (_SB.PCI0)
{
Device (ISA)
{
Name (_ADR, 0x00010000) // _ADR: Address
OperationRegion (P40C, PCI_Config, 0x60, 0x04)
- Field (^PX13.P13C, AnyAcc, NoLock, Preserve)
- {
- Offset (0x5F),
- , 7,
- LPEN, 1,
- Offset (0x67),
- , 3,
- CAEN, 1,
- , 3,
- CBEN, 1
- }
}
}
ich9 DSDT changes:
Scope (_SB.PCI0)
{
Device (ISA)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
OperationRegion (LPCD, PCI_Config, 0x80, 0x02)
Field (LPCD, AnyAcc, NoLock, Preserve)
{
COMA, 3,
, 1,
COMB, 3,
Offset (0x01),
LPTD, 2
}
-
- OperationRegion (LPCE, PCI_Config, 0x82, 0x02)
- Field (LPCE, AnyAcc, NoLock, Preserve)
- {
- CAEN, 1,
- CBEN, 1,
- LPEN, 1
- }
}
}
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200619091905.21676-10-kraxel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386')
| -rw-r--r-- | hw/i386/acpi-build.c | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index d27cecc..ffbdbee 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1360,15 +1360,6 @@ static void build_q35_isa_bridge(Aml *table) aml_append(field, aml_named_field("LPTD", 2)); aml_append(dev, field); - aml_append(dev, aml_operation_region("LPCE", AML_PCI_CONFIG, - aml_int(0x82), 0x02)); - /* enable bits */ - field = aml_field("LPCE", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE); - aml_append(field, aml_named_field("CAEN", 1)); - aml_append(field, aml_named_field("CBEN", 1)); - aml_append(field, aml_named_field("LPEN", 1)); - aml_append(dev, field); - aml_append(scope, dev); aml_append(table, scope); } @@ -1392,7 +1383,6 @@ static void build_piix4_isa_bridge(Aml *table) { Aml *dev; Aml *scope; - Aml *field; scope = aml_scope("_SB.PCI0"); dev = aml_device("ISA"); @@ -1401,19 +1391,6 @@ static void build_piix4_isa_bridge(Aml *table) /* PIIX PCI to ISA irq remapping */ aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG, aml_int(0x60), 0x04)); - /* enable bits */ - field = aml_field("^PX13.P13C", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE); - /* Offset(0x5f),, 7, */ - aml_append(field, aml_reserved_field(0x2f8)); - aml_append(field, aml_reserved_field(7)); - aml_append(field, aml_named_field("LPEN", 1)); - /* Offset(0x67),, 3, */ - aml_append(field, aml_reserved_field(0x38)); - aml_append(field, aml_reserved_field(3)); - aml_append(field, aml_named_field("CAEN", 1)); - aml_append(field, aml_reserved_field(3)); - aml_append(field, aml_named_field("CBEN", 1)); - aml_append(dev, field); aml_append(scope, dev); aml_append(table, scope); |