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| author | Isaku Yamahata <isaku.yamahata@linux.intel.com> | 2024-03-20 03:39:14 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-04-23 17:35:25 +0200 |
| commit | b07bf7b73fd02d24a7baa64a580f4974b86bbc86 (patch) | |
| tree | bb50aa8a3d2d1b4a52842d73b48abaa67aacb3cc /hw/i386 | |
| parent | 42c11ae2416dcbcd694ec3ee574fe2f3e70099ae (diff) | |
| download | qemu-b07bf7b73fd02d24a7baa64a580f4974b86bbc86.zip qemu-b07bf7b73fd02d24a7baa64a580f4974b86bbc86.tar.gz qemu-b07bf7b73fd02d24a7baa64a580f4974b86bbc86.tar.bz2 | |
q35: Introduce smm_ranges property for q35-pci-host
Add a q35 property to check whether or not SMM ranges, e.g. SMRAM, TSEG,
etc... exist for the target platform. TDX doesn't support SMM and doesn't
play nice with QEMU modifying related guest memory ranges.
Signed-off-by: Isaku Yamahata <isaku.yamahata@linux.intel.com>
Co-developed-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Message-ID: <20240320083945.991426-19-michael.roth@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/i386')
| -rw-r--r-- | hw/i386/pc_q35.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 6e1180d..bb53a51 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -219,6 +219,8 @@ static void pc_q35_init(MachineState *machine) x86ms->above_4g_mem_size, NULL); object_property_set_bool(phb, PCI_HOST_BYPASS_IOMMU, pcms->default_bus_bypass_iommu, NULL); + object_property_set_bool(phb, PCI_HOST_PROP_SMM_RANGES, + x86_machine_is_smm_enabled(x86ms), NULL); sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); /* pci */ |