diff options
| author | Bernhard Beschow <shentey@gmail.com> | 2023-10-07 14:38:16 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2023-10-22 05:18:16 -0400 |
| commit | 295385127e83a923e166f8b4fe1e543ee4540018 (patch) | |
| tree | 54151c63cea2ed84cd5003befaadfda91eba719f /hw/i386 | |
| parent | 40f70623875b4ae46e04f57cfa7c80b6af917e1b (diff) | |
| download | qemu-295385127e83a923e166f8b4fe1e543ee4540018.zip qemu-295385127e83a923e166f8b4fe1e543ee4540018.tar.gz qemu-295385127e83a923e166f8b4fe1e543ee4540018.tar.bz2 | |
hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize()
When the board assigns the ISA IRQs after the device's realize(), internal
devices such as the RTC can't be wired in ich9_lpc_realize() since the qemu_irqs
are still NULL. Fix that by assigning the ISA interrupts before realize().
This change is necessary for PIIX consolidation because PIIX4 wires the RTC
interrupts in its realize() method, so PIIX3 needs to do so as well. Since the
PC and Q35 boards share RTC code, and since PIIX3 needs the change, ICH9 needs
to be adapted as well.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-9-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386')
| -rw-r--r-- | hw/i386/pc_q35.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index a7386f2..597943f 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -242,11 +242,18 @@ static void pc_q35_init(MachineState *machine) host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0")); pcms->bus = host_bus; + /* irq lines */ + gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); + /* create ISA bus */ lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), TYPE_ICH9_LPC_DEVICE); qdev_prop_set_bit(DEVICE(lpc), "smm-enabled", x86_machine_is_smm_enabled(x86ms)); + lpc_dev = DEVICE(lpc); + for (i = 0; i < IOAPIC_NUM_PINS; i++) { + qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]); + } pci_realize_and_unref(lpc, host_bus, &error_fatal); rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc")); @@ -273,13 +280,6 @@ static void pc_q35_init(MachineState *machine) "true", true); } - /* irq lines */ - gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); - - lpc_dev = DEVICE(lpc); - for (i = 0; i < IOAPIC_NUM_PINS; i++) { - qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]); - } isa_bus = ISA_BUS(qdev_get_child_bus(lpc_dev, "isa.0")); if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { |