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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-09-14 11:02:41 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-11-07 12:13:28 +0100 |
| commit | 18f86aecd6a1bea0f78af14587a684ad966d8d3a (patch) | |
| tree | 9cc1b7f8067a96c6bdc20b851c8a804363574248 /hw/i386/amd_iommu.c | |
| parent | 04591b3ddd9a96b9298a1dd437a6464ab55e62ee (diff) | |
| download | qemu-18f86aecd6a1bea0f78af14587a684ad966d8d3a.zip qemu-18f86aecd6a1bea0f78af14587a684ad966d8d3a.tar.gz qemu-18f86aecd6a1bea0f78af14587a684ad966d8d3a.tar.bz2 | |
target/mips: Fix TX79 LQ/SQ opcodes
The base register address offset is *signed*.
Cc: qemu-stable@nongnu.org
Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914090447.12557-1-philmd@linaro.org>
Diffstat (limited to 'hw/i386/amd_iommu.c')
0 files changed, 0 insertions, 0 deletions