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authorPeter Maydell <peter.maydell@linaro.org>2020-06-23 18:57:05 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-06-23 18:57:05 +0100
commitd4b78317b7cf8c0c635b70086503813f79ff21ec (patch)
treebab8d849b983bcc72e9680acf23470679fb9e251 /hw/i2c
parentd88d5a3806d78dcfca648c62dae9d88d3e803bd2 (diff)
parent539533b85fbd269f777bed931de8ccae1dd837e9 (diff)
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200623' into staging
target-arm queue: * util/oslib-posix : qemu_init_exec_dir implementation for Mac * target/arm: Last parts of neon decodetree conversion * hw/arm/virt: Add 5.0 HW compat props * hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status * mps2: Add CMSDK APB watchdog, FPGAIO block, S2I devices and I2C devices * mps2: Add some unimplemented-device stubs for audio and GPIO * mps2-tz: Use the ARM SBCon two-wire serial bus interface * target/arm: Check supported KVM features globally (not per vCPU) * tests/qtest/arm-cpu-features: Add feature setting tests * arm/virt: Add memory hot remove support # gpg: Signature made Tue 23 Jun 2020 12:38:31 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200623: (42 commits) arm/virt: Add memory hot remove support tests/qtest/arm-cpu-features: Add feature setting tests target/arm: Check supported KVM features globally (not per vCPU) hw/arm/mps2-tz: Use the ARM SBCon two-wire serial bus interface hw/arm/mps2: Add audio I2S interface as unimplemented device hw/arm/mps2: Add I2C devices hw/arm/mps2: Add SPI devices hw/arm/mps2: Map the FPGA I/O block hw/arm/mps2: Add CMSDK AHB GPIO peripherals as unimplemented devices hw/arm/mps2: Add CMSDK APB watchdog device hw/arm/mps2: Rename CMSDK AHB peripheral region hw/arm/mps2: Document CMSDK/FPGA APB subsystem sections hw/arm: Use TYPE_VERSATILE_I2C instead of hardcoded string hw/i2c: Add header for ARM SBCon two-wire serial bus interface hw/i2c/versatile_i2c: Add SCL/SDA definitions hw/i2c/versatile_i2c: Add definitions for register addresses hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status target/arm: Remove dead code relating to SABA and UABA target/arm: Remove unnecessary gen_io_end() calls target/arm: Move some functions used only in translate-neon.inc.c to that file ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/i2c')
-rw-r--r--hw/i2c/versatile_i2c.c38
1 files changed, 20 insertions, 18 deletions
diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c
index 1ac2a6f..da8cda2 100644
--- a/hw/i2c/versatile_i2c.c
+++ b/hw/i2c/versatile_i2c.c
@@ -1,5 +1,6 @@
/*
- * ARM Versatile I2C controller
+ * ARM SBCon two-wire serial bus interface (I2C bitbang)
+ * a.k.a. ARM Versatile I2C controller
*
* Copyright (c) 2006-2007 CodeSourcery.
* Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
@@ -22,32 +23,33 @@
*/
#include "qemu/osdep.h"
-#include "hw/sysbus.h"
-#include "hw/i2c/bitbang_i2c.h"
+#include "hw/i2c/arm_sbcon_i2c.h"
+#include "hw/registerfields.h"
#include "qemu/log.h"
#include "qemu/module.h"
-#define TYPE_VERSATILE_I2C "versatile_i2c"
#define VERSATILE_I2C(obj) \
OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C)
-typedef struct VersatileI2CState {
- SysBusDevice parent_obj;
+typedef ArmSbconI2CState VersatileI2CState;
- MemoryRegion iomem;
- bitbang_i2c_interface bitbang;
- int out;
- int in;
-} VersatileI2CState;
+
+REG32(CONTROL_GET, 0)
+REG32(CONTROL_SET, 0)
+REG32(CONTROL_CLR, 4)
+
+#define SCL BIT(0)
+#define SDA BIT(1)
static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
unsigned size)
{
VersatileI2CState *s = (VersatileI2CState *)opaque;
- if (offset == 0) {
+ switch (offset) {
+ case A_CONTROL_SET:
return (s->out & 1) | (s->in << 1);
- } else {
+ default:
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad offset 0x%x\n", __func__, (int)offset);
return -1;
@@ -60,18 +62,18 @@ static void versatile_i2c_write(void *opaque, hwaddr offset,
VersatileI2CState *s = (VersatileI2CState *)opaque;
switch (offset) {
- case 0:
+ case A_CONTROL_SET:
s->out |= value & 3;
break;
- case 4:
+ case A_CONTROL_CLR:
s->out &= ~value;
break;
default:
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad offset 0x%x\n", __func__, (int)offset);
}
- bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0);
- s->in = bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
+ bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SCL, (s->out & SCL) != 0);
+ s->in = bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SDA, (s->out & SDA) != 0);
}
static const MemoryRegionOps versatile_i2c_ops = {
@@ -90,7 +92,7 @@ static void versatile_i2c_init(Object *obj)
bus = i2c_init_bus(dev, "i2c");
bitbang_i2c_init(&s->bitbang, bus);
memory_region_init_io(&s->iomem, obj, &versatile_i2c_ops, s,
- "versatile_i2c", 0x1000);
+ "arm_sbcon_i2c", 0x1000);
sysbus_init_mmio(sbd, &s->iomem);
}