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authorMarkus Armbruster <armbru@redhat.com>2013-11-28 17:26:59 +0100
committerAndreas Färber <afaerber@suse.de>2013-12-23 00:27:23 +0100
commitbfa6dfd070f0cb5be37ae3bd6b90bdd67849c311 (patch)
treee2444fc55a12e1d9b57e9e04c5ad082509862069 /hw/i2c
parent08c58f92f66dcf0a9097c3a6a65bcc4ffd71268f (diff)
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ich9: Document why cannot_instantiate_with_device_add_yet
An ICH9 southbridge contains several PCI devices, some of them with multiple functions. We model each function as a separate qdev. Two of them need some special wiring set up in pc_q35_init() to work: the LPC controller at 00:1f.0, and the SMBus controller at 00:1f.3. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/i2c')
-rw-r--r--hw/i2c/smbus_ich9.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c
index c1ffa34..8d47eaf 100644
--- a/hw/i2c/smbus_ich9.c
+++ b/hw/i2c/smbus_ich9.c
@@ -97,11 +97,15 @@ static void ich9_smb_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
k->revision = ICH9_A2_SMB_REVISION;
k->class_id = PCI_CLASS_SERIAL_SMBUS;
- dc->cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
dc->vmsd = &vmstate_ich9_smbus;
dc->desc = "ICH9 SMBUS Bridge";
k->init = ich9_smbus_initfn;
k->config_write = ich9_smbus_write_config;
+ /*
+ * Reason: part of ICH9 southbridge, needs to be wired up by
+ * pc_q35_init()
+ */
+ dc->cannot_instantiate_with_device_add_yet = true;
}
i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)