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| author | Yongbok Kim <yongbok.kim@mips.com> | 2019-01-03 14:58:16 +0100 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-01-18 16:53:28 +0100 |
| commit | 5fb2dcd17921be71b55fb62d59a12992707d2d3e (patch) | |
| tree | ba2673071cd6964bd94d261ff537f0fcc2fdfc20 /hw/i2c | |
| parent | 167db30e981cd72bef15182178037e51afc8e40d (diff) | |
| download | qemu-5fb2dcd17921be71b55fb62d59a12992707d2d3e.zip qemu-5fb2dcd17921be71b55fb62d59a12992707d2d3e.tar.gz qemu-5fb2dcd17921be71b55fb62d59a12992707d2d3e.tar.bz2 | |
target/mips: Provide R/W access to SAARI and SAAR CP0 registers
Provide R/W access to SAARI and SAAR CP0 registers.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'hw/i2c')
0 files changed, 0 insertions, 0 deletions