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| author | Yongbok Kim <yongbok.kim@mips.com> | 2019-01-03 16:46:32 +0100 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-01-18 16:53:28 +0100 |
| commit | 043715d1e0fbb3e3411be3f898c5b77b7f90327a (patch) | |
| tree | 1e92367ebcd199a0e18f4b4233e076299946c440 /hw/i2c | |
| parent | e5345d96752a9dec441b022502be34e01bcacca8 (diff) | |
| download | qemu-043715d1e0fbb3e3411be3f898c5b77b7f90327a.zip qemu-043715d1e0fbb3e3411be3f898c5b77b7f90327a.tar.gz qemu-043715d1e0fbb3e3411be3f898c5b77b7f90327a.tar.bz2 | |
target/mips: Update ITU to utilize SAARI and SAAR CP0 registers
Update ITU to utilize SAARI and SAAR CP0 registers.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'hw/i2c')
0 files changed, 0 insertions, 0 deletions