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| author | Bin Meng <bin.meng@windriver.com> | 2020-09-01 09:39:08 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-09-09 15:54:18 -0700 |
| commit | 47374b0761c1e3b6bff210dbb9d1a965e71c213e (patch) | |
| tree | 82f2cae6bd764051de7d94493d68cbc9673d671f /hw/hyperv | |
| parent | dfc388797cc413072e58a8f9a831633f29212448 (diff) | |
| download | qemu-47374b0761c1e3b6bff210dbb9d1a965e71c213e.zip qemu-47374b0761c1e3b6bff210dbb9d1a965e71c213e.tar.gz qemu-47374b0761c1e3b6bff210dbb9d1a965e71c213e.tar.bz2 | |
hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
Microchip PolarFire SoC integrates 2 Candence GEMs to provide
IEEE 802.3 standard-compliant 10/100/1000 Mbps ethernet interface.
On the Icicle Kit board, GEM0 connects to a PHY at address 8 while
GEM1 connects to a PHY at address 9.
The 2nd stage bootloader (U-Boot) is using GEM1 by default, so we
must specify 2 '-nic' options from the command line in order to get
a working ethernet.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1598924352-89526-14-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/hyperv')
0 files changed, 0 insertions, 0 deletions