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| author | Steffen Görtz <contrib@steffen-goertz.de> | 2019-01-07 15:23:47 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-01-07 15:23:47 +0000 |
| commit | 805f61bbb33ba24777a854df5d018858502d6d9c (patch) | |
| tree | bf3c08ff53cc0fbb95df31def69b02ce599dab72 /hw/gpio/trace-events | |
| parent | f30890def51f777db1da350f9c737cc75615bdf0 (diff) | |
| download | qemu-805f61bbb33ba24777a854df5d018858502d6d9c.zip qemu-805f61bbb33ba24777a854df5d018858502d6d9c.tar.gz qemu-805f61bbb33ba24777a854df5d018858502d6d9c.tar.bz2 | |
hw/gpio/nrf51_gpio: Add nRF51 GPIO peripheral
This adds a model of the nRF51 GPIO peripheral.
Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
The nRF51 series microcontrollers support up to 32 GPIO pins in various configurations.
The pins can be used as input pins with pull-ups or pull-down.
Furthermore, three different output driver modes per level are
available (disconnected, standard, high-current).
The GPIO-Peripheral has a mechanism for detecting level changes which is
not featured in this model.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 20190103091119.9367-6-stefanha@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/gpio/trace-events')
| -rw-r--r-- | hw/gpio/trace-events | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/gpio/trace-events b/hw/gpio/trace-events new file mode 100644 index 0000000..cb41a89 --- /dev/null +++ b/hw/gpio/trace-events @@ -0,0 +1,7 @@ +# See docs/devel/tracing.txt for syntax documentation. + +# hw/gpio/nrf51_gpio.c +nrf51_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64 +nrf51_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64 +nrf51_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 +nrf51_gpio_update_output_irq(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64
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