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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-07-02 11:40:11 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-07-09 16:09:12 +0100 |
| commit | 74d359b52db760f8818476f4fbaab0ffab76a8ef (patch) | |
| tree | d379544ff86080a8d700aa74b5ab54fb6d5da207 /hw/gpio/trace-events | |
| parent | e24a9f6a595cc4502b67046ea3860cae2be15b71 (diff) | |
| download | qemu-74d359b52db760f8818476f4fbaab0ffab76a8ef.zip qemu-74d359b52db760f8818476f4fbaab0ffab76a8ef.tar.gz qemu-74d359b52db760f8818476f4fbaab0ffab76a8ef.tar.bz2 | |
hw/gpio/pl061: Add tracepoints for register read and write
Add tracepoints for reads and writes to the PL061 registers. This requires
restructuring pl061_read() to only return after the tracepoint, rather
than having lots of early-returns.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/gpio/trace-events')
| -rw-r--r-- | hw/gpio/trace-events | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/gpio/trace-events b/hw/gpio/trace-events index 48ccbb1..442be94 100644 --- a/hw/gpio/trace-events +++ b/hw/gpio/trace-events @@ -18,6 +18,8 @@ pl061_update(const char *id, uint32_t dir, uint32_t data) "%s GPIODIR 0x%x GPIOD pl061_set_output(const char *id, int gpio, int level) "%s setting output %d to %d" pl061_input_change(const char *id, int gpio, int level) "%s input %d changed to %d" pl061_update_istate(const char *id, uint32_t istate, uint32_t im, int level) "%s GPIORIS 0x%x GPIOIE 0x%x interrupt level %d" +pl061_read(const char *id, uint64_t offset, uint64_t r) "%s offset 0x%" PRIx64 " value 0x%" PRIx64 +pl061_write(const char *id, uint64_t offset, uint64_t value) "%s offset 0x%" PRIx64 " value 0x%" PRIx64 # sifive_gpio.c sifive_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64 |