diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2024-03-08 18:19:09 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-03-08 18:19:09 +0000 |
| commit | a146c6f88c169f054284f16ad8dcd565892d3db8 (patch) | |
| tree | 930e8853eb87bc6aaa4dead0af87859f1781e515 /hw/gpio/Kconfig | |
| parent | cbccded4a2b5d685a426a437e25f67d3a375b292 (diff) | |
| parent | bbf6c6dbead82292a20951eb1204442a6b838de9 (diff) | |
| download | qemu-a146c6f88c169f054284f16ad8dcd565892d3db8.zip qemu-a146c6f88c169f054284f16ad8dcd565892d3db8.tar.gz qemu-a146c6f88c169f054284f16ad8dcd565892d3db8.tar.bz2 | |
Merge tag 'pull-target-arm-20240308' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* Implement FEAT_ECV
* STM32L4x5: Implement GPIO device
* Fix 32-bit SMOPA
* Refactor v7m related code from cpu32.c into its own file
* hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later
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# gpg: Signature made Fri 08 Mar 2024 15:49:49 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20240308' of https://git.linaro.org/people/pmaydell/qemu-arm:
target/arm: Move v7m-related code from cpu32.c into a separate file
hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later
target/arm: Fix 32-bit SMOPA
tests/qtest: Add STM32L4x5 GPIO QTest testcase
hw/arm: Connect STM32L4x5 GPIO to STM32L4x5 SoC
hw/gpio: Implement STM32L4x5 GPIO
target/arm: Enable FEAT_ECV for 'max' CPU
target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling
target/arm: Define CNTPCTSS_EL0 and CNTVCTSS_EL0
target/arm: Implement new FEAT_ECV trap bits
target/arm: Don't allow RES0 CNTHCTL_EL2 bits to be written
target/arm: use FIELD macro for CNTHCTL bit definitions
target/arm: Timer _EL02 registers UNDEF for E2H == 0
target/arm: Move some register related defines to internals.h
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/gpio/Kconfig')
| -rw-r--r-- | hw/gpio/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig index d2cf3ac..712940b 100644 --- a/hw/gpio/Kconfig +++ b/hw/gpio/Kconfig @@ -16,3 +16,6 @@ config GPIO_PWR config SIFIVE_GPIO bool + +config STM32L4X5_GPIO + bool |