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authorAurelien Jarno <aurelien@aurel32.net>2011-01-27 08:21:35 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-01-29 15:07:19 +0100
commitf53671c054ba0b5d5b10e2a7294786fa2f73479e (patch)
tree7b19c366220b1da1628a4a9985c7d64673a079d6 /hw/escc.c
parent0bb533374a110f22412d95e75768afb8212f8243 (diff)
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escc: fix interrupt flags
Recent PowerPC kernel end up in kernel panic during boot in -nographic mode. In this mode the second serial port is used as the udbg console, and thus a few characters are sent on this port. This activates the tx interrupt flag, and later choke the Linux kernel, as it was not expecting such a flag to be set. The problem here comes from the fact that contrary to most devices the interrupt flags are only set if the interrupt is enabled. Quoting the datasheet: "If the corresponding IE bit is not set, the IP for that source of interrupt will never be set." This patch fixes that by enabling the interrupt flag only when the corresponding interrupt is enabled. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/escc.c')
-rw-r--r--hw/escc.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/hw/escc.c b/hw/escc.c
index ba60636..f6fd919 100644
--- a/hw/escc.c
+++ b/hw/escc.c
@@ -369,14 +369,18 @@ static inline void set_txint(ChannelState *s)
if (!s->rxint_under_svc) {
s->txint_under_svc = 1;
if (s->chn == chn_a) {
- s->rregs[R_INTR] |= INTR_TXINTA;
+ if (s->wregs[W_INTR] & INTR_TXINT) {
+ s->rregs[R_INTR] |= INTR_TXINTA;
+ }
if (s->wregs[W_MINTR] & MINTR_STATUSHI)
s->otherchn->rregs[R_IVEC] = IVEC_HITXINTA;
else
s->otherchn->rregs[R_IVEC] = IVEC_LOTXINTA;
} else {
s->rregs[R_IVEC] = IVEC_TXINTB;
- s->otherchn->rregs[R_INTR] |= INTR_TXINTB;
+ if (s->wregs[W_INTR] & INTR_TXINT) {
+ s->otherchn->rregs[R_INTR] |= INTR_TXINTB;
+ }
}
escc_update_irq(s);
}