diff options
author | Gerd Hoffmann <kraxel@redhat.com> | 2018-09-25 09:56:46 +0200 |
---|---|---|
committer | Gerd Hoffmann <kraxel@redhat.com> | 2018-09-27 08:07:51 +0200 |
commit | d46b40fce2e3f5187bb9a67d348e8bfd4f73ad3b (patch) | |
tree | 8fe4c27cf074bd1d0f26e5409bc6ae9022c5d975 /hw/display/vga-pci.c | |
parent | 06510b899fbb43a709ddb5ba04610efa7fbef13b (diff) | |
download | qemu-d46b40fce2e3f5187bb9a67d348e8bfd4f73ad3b.zip qemu-d46b40fce2e3f5187bb9a67d348e8bfd4f73ad3b.tar.gz qemu-d46b40fce2e3f5187bb9a67d348e8bfd4f73ad3b.tar.bz2 |
display/stdvga: add edid support.
This patch adds edid support to the qemu stdvga. It is turned off by
default and can be enabled with the new edid property. The patch also
adds xres and yres properties to specify the video mode you want the
guest use. Works only with edid enabled and updated guest driver.
The mmio bar of the stdvga has some unused address space at the start.
It was reserved just in case it'll be needed for virtio, but it turned
out to not be needed for that. So let's use that region to place the
EDID data block there.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20180925075646.25114-6-kraxel@redhat.com
Diffstat (limited to 'hw/display/vga-pci.c')
-rw-r--r-- | hw/display/vga-pci.c | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index e9e62ea..24ca1b3 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -30,18 +30,22 @@ #include "ui/pixel_ops.h" #include "qemu/timer.h" #include "hw/loader.h" +#include "hw/display/edid.h" enum vga_pci_flags { PCI_VGA_FLAG_ENABLE_MMIO = 1, PCI_VGA_FLAG_ENABLE_QEXT = 2, + PCI_VGA_FLAG_ENABLE_EDID = 3, }; typedef struct PCIVGAState { PCIDevice dev; VGACommonState vga; uint32_t flags; + qemu_edid_info edid_info; MemoryRegion mmio; - MemoryRegion mrs[3]; + MemoryRegion mrs[4]; + uint8_t edid[256]; } PCIVGAState; #define TYPE_PCI_VGA "pci-vga" @@ -195,8 +199,10 @@ void pci_std_vga_mmio_region_init(VGACommonState *s, Object *owner, MemoryRegion *parent, MemoryRegion *subs, - bool qext) + bool qext, bool edid) { + PCIVGAState *d = container_of(s, PCIVGAState, vga); + memory_region_init_io(&subs[0], owner, &pci_vga_ioport_ops, s, "vga ioports remapped", PCI_VGA_IOPORT_SIZE); memory_region_add_subregion(parent, PCI_VGA_IOPORT_OFFSET, @@ -213,6 +219,12 @@ void pci_std_vga_mmio_region_init(VGACommonState *s, memory_region_add_subregion(parent, PCI_VGA_QEXT_OFFSET, &subs[2]); } + + if (edid) { + qemu_edid_generate(d->edid, sizeof(d->edid), &d->edid_info); + qemu_edid_region_io(&subs[3], owner, d->edid, sizeof(d->edid)); + memory_region_add_subregion(parent, 0, &subs[3]); + } } static void pci_std_vga_realize(PCIDevice *dev, Error **errp) @@ -220,6 +232,7 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) PCIVGAState *d = PCI_VGA(dev); VGACommonState *s = &d->vga; bool qext = false; + bool edid = false; /* vga + console init */ vga_common_init(s, OBJECT(dev)); @@ -240,7 +253,11 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) qext = true; pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2); } - pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext); + if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_EDID)) { + edid = true; + } + pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, + qext, edid); pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); } @@ -263,6 +280,7 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) PCIVGAState *d = PCI_VGA(dev); VGACommonState *s = &d->vga; bool qext = false; + bool edid = false; /* vga + console init */ vga_common_init(s, OBJECT(dev)); @@ -276,7 +294,10 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) qext = true; pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2); } - pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext); + if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_EDID)) { + edid = true; + } + pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext, edid); pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); @@ -308,6 +329,9 @@ static Property vga_pci_properties[] = { DEFINE_PROP_BIT("mmio", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_MMIO, true), DEFINE_PROP_BIT("qemu-extended-regs", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true), + DEFINE_PROP_BIT("edid", + PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false), + DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_BOOL("global-vmstate", PCIVGAState, vga.global_vmstate, false), DEFINE_PROP_END_OF_LIST(), }; @@ -316,6 +340,9 @@ static Property secondary_pci_properties[] = { DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 16), DEFINE_PROP_BIT("qemu-extended-regs", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true), + DEFINE_PROP_BIT("edid", + PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false), + DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_END_OF_LIST(), }; |