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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-12-10 13:24:51 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-10 13:24:51 +0000 |
| commit | c21c3b53e122a807ae4f5443b7f74f3850f21e37 (patch) | |
| tree | 2293b5bf3bd430a8287ad09cd089da07d08c539d /hw/cpu | |
| parent | 4c25f365ab3a4f7de0a49af5d39ddc9d459e245b (diff) | |
| download | qemu-c21c3b53e122a807ae4f5443b7f74f3850f21e37.zip qemu-c21c3b53e122a807ae4f5443b7f74f3850f21e37.tar.gz qemu-c21c3b53e122a807ae4f5443b7f74f3850f21e37.tar.bz2 | |
hw/timer: Introduce ARM A9 Global Timer.
The ARM A9 MPCore has a timer that is global to all cores in the cluster.
The timer is shared but each core has a private independent comparator
and interrupt.
Based on version contributed by Francois LEGAL.
Signed-off-by: François LEGAL <devel@thom.fr.eu.org>
Message-id: 4918e89476b8da916be2964ec41578b50d569a37.1385969450.git.peter.crosthwaite@xilinx.com
[PC changes:
* New commit message
* Re-implemented as single timer model
* Fixed backwards counting issue in polled mode
* completed VMSD fields
* macroified magic numbers (and headerified reg definitions)
* split of as device-model-only patch
* use bitops for 64 bit register access
* Fixed auto increment mode to check condition properly
* general cleanup (names/style etc).
]
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
[PMM:
* minor typo fixes
* added missing return after error_setg()
* dropped setting dc->no_user = 1
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/cpu')
0 files changed, 0 insertions, 0 deletions