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author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2021-09-03 12:32:17 +0100 |
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committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2021-09-08 11:09:45 +0100 |
commit | 8e8aa96590156577ed8a2623d1a2e4db4e5748b8 (patch) | |
tree | 71447f3a27d0bcf3d89bb809eac46e646207a305 /hw/cpu | |
parent | 9d248a4be524a6c820634e9b58e79085972cb78f (diff) | |
download | qemu-8e8aa96590156577ed8a2623d1a2e4db4e5748b8.zip qemu-8e8aa96590156577ed8a2623d1a2e4db4e5748b8.tar.gz qemu-8e8aa96590156577ed8a2623d1a2e4db4e5748b8.tar.bz2 |
escc: introduce escc_soft_reset_chn() for software reset
This new software reset function is to be called when the appropriate channel
software reset bit is written to register WR9. Its initial implementation is
the same as the existing escc_reset_chn() function used for device reset.
Add a new trace event when the guest initiates a soft reset via the WR9 register
to help diagnose guest reset issues.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210903113223.19551-4-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'hw/cpu')
0 files changed, 0 insertions, 0 deletions