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authorRichard Henderson <richard.henderson@linaro.org>2024-04-25 08:07:45 -0700
committerRichard Henderson <richard.henderson@linaro.org>2024-04-25 08:07:45 -0700
commit83baec642a13a69398a2643a1f905606c13cd363 (patch)
tree56ddab1c6d9d1869df33f60f34a934b726ef43ff /hw/core
parent45bef95ca5e9d649e432f2acd82163fb5bccbe47 (diff)
parent214652da123e3821657a64691ee556281e9f6238 (diff)
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Merge tag 'pull-target-arm-20240425' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Implement FEAT_NMI and NMI support in the GICv3 * hw/dma: avoid apparent overflow in soc_dma_set_request * linux-user/flatload.c: Remove unused bFLT shared-library and ZFLAT code * Add ResetType argument to Resettable hold and exit phase methods * Add RESET_TYPE_SNAPSHOT_LOAD ResetType * Implement STM32L4x5 USART # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmYqMhMZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3uVlD/47U3zYP33y4+wJcRScC0QI # jYd82jS7GhD5YP5QPrIEMaSbDwtYGi4Rez1taaHvZ2fWLg2gE973iixmTaM2mXCd # xPEqMsRXkFrQnC89K5/v9uR04AvHxoM8J2mD2OKnUT0RVBs38WxCUMLETBsD18/q # obs1RzDRhEs5BnwwPMm5HI1iQeVvDRe/39O3w3rZfA8DuqerrNOQWuJd43asHYjO # Gc1QzCGhALlXDoqk11IzjhJ7es8WbJ5XGvrSNe9QLGNJwNsu9oi1Ez+5WK2Eht9r # eRvGNFjH4kQY1YCShZjhWpdzU9KT0+80KLirMJFcI3vUztrYZ027/rMyKLHVOybw # YAqgEUELwoGVzacpaJg73f77uknKoXrfTH25DfoLX0yFCB35JHOPcjU4Uq1z1pfV # I80ZcJBDJ95mXPfyKLrO+0IyVBztLybufedK2aiH16waEGDpgsJv66FB2QRuQBYW # O0i6/4DEUZmfSpOmr8ct+julz7wCWSjbvo6JFWxzzxvD0M5T3AFKXZI244g1SMdh # LS8V7WVCVzVJ5mK8Ujp2fVaIIxiBzlXVZrQftWv5rhyDOiIIeP8pdekmPlI6p5HK # 3/2efzSYNL2UCDZToIq24El/3md/7vHR6DBfBT1/pagxWUstqqLgkJO42jQtTG0E # JY1cZ/EQY7cqXGrww8lhWA== # =WEsU # -----END PGP SIGNATURE----- # gpg: Signature made Thu 25 Apr 2024 03:36:03 AM PDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] * tag 'pull-target-arm-20240425' of https://git.linaro.org/people/pmaydell/qemu-arm: (37 commits) tests/qtest: Add tests for the STM32L4x5 USART hw/arm: Add the USART to the stm32l4x5 SoC hw/char/stm32l4x5_usart: Add options for serial parameters setting hw/char/stm32l4x5_usart: Enable serial read and write hw/char: Implement STM32L4x5 USART skeleton reset: Add RESET_TYPE_SNAPSHOT_LOAD docs/devel/reset: Update to new API for hold and exit phase methods hw, target: Add ResetType argument to hold and exit phase methods scripts/coccinelle: New script to add ResetType to hold and exit phases allwinner-i2c, adm1272: Use device_cold_reset() for software-triggered reset hw/misc: Don't special case RESET_TYPE_COLD in npcm7xx_clk, gcr linux-user/flatload.c: Remove unused bFLT shared-library and ZFLAT code hw/dma: avoid apparent overflow in soc_dma_set_request hw/arm/virt: Enable NMI support in the GIC if the CPU has FEAT_NMI target/arm: Add FEAT_NMI to max hw/intc/arm_gicv3: Report the VINMI interrupt hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update() hw/intc/arm_gicv3: Implement NMI interrupt priority hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read() hw/intc/arm_gicv3: Add NMI handling CPU interface registers ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/core')
-rw-r--r--hw/core/cpu-common.c2
-rw-r--r--hw/core/qdev.c4
-rw-r--r--hw/core/reset.c17
-rw-r--r--hw/core/resettable.c8
4 files changed, 10 insertions, 21 deletions
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index 4bd9c70..a72d48d 100644
--- a/hw/core/cpu-common.c
+++ b/hw/core/cpu-common.c
@@ -113,7 +113,7 @@ void cpu_reset(CPUState *cpu)
trace_cpu_reset(cpu->cpu_index);
}
-static void cpu_common_reset_hold(Object *obj)
+static void cpu_common_reset_hold(Object *obj, ResetType type)
{
CPUState *cpu = CPU(obj);
CPUClass *cc = CPU_GET_CLASS(cpu);
diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index 00efaf1..f3a996f 100644
--- a/hw/core/qdev.c
+++ b/hw/core/qdev.c
@@ -760,10 +760,10 @@ static void device_phases_reset(DeviceState *dev)
rc->phases.enter(OBJECT(dev), RESET_TYPE_COLD);
}
if (rc->phases.hold) {
- rc->phases.hold(OBJECT(dev));
+ rc->phases.hold(OBJECT(dev), RESET_TYPE_COLD);
}
if (rc->phases.exit) {
- rc->phases.exit(OBJECT(dev));
+ rc->phases.exit(OBJECT(dev), RESET_TYPE_COLD);
}
}
diff --git a/hw/core/reset.c b/hw/core/reset.c
index d50da7e..58dfc8d 100644
--- a/hw/core/reset.c
+++ b/hw/core/reset.c
@@ -44,13 +44,6 @@ static ResettableContainer *get_root_reset_container(void)
}
/*
- * Reason why the currently in-progress qemu_devices_reset() was called.
- * If we made at least SHUTDOWN_CAUSE_SNAPSHOT_LOAD have a corresponding
- * ResetType we could perhaps avoid the need for this global.
- */
-static ShutdownCause device_reset_reason;
-
-/*
* This is an Object which implements Resettable simply to call the
* callback function in the hold phase.
*/
@@ -73,12 +66,11 @@ static ResettableState *legacy_reset_get_state(Object *obj)
return &lr->reset_state;
}
-static void legacy_reset_hold(Object *obj)
+static void legacy_reset_hold(Object *obj, ResetType type)
{
LegacyReset *lr = LEGACY_RESET(obj);
- if (device_reset_reason == SHUTDOWN_CAUSE_SNAPSHOT_LOAD &&
- lr->skip_on_snapshot_load) {
+ if (type == RESET_TYPE_SNAPSHOT_LOAD && lr->skip_on_snapshot_load) {
return;
}
lr->func(lr->opaque);
@@ -180,8 +172,9 @@ void qemu_unregister_resettable(Object *obj)
void qemu_devices_reset(ShutdownCause reason)
{
- device_reset_reason = reason;
+ ResetType type = (reason == SHUTDOWN_CAUSE_SNAPSHOT_LOAD) ?
+ RESET_TYPE_SNAPSHOT_LOAD : RESET_TYPE_COLD;
/* Reset the simulation */
- resettable_reset(OBJECT(get_root_reset_container()), RESET_TYPE_COLD);
+ resettable_reset(OBJECT(get_root_reset_container()), type);
}
diff --git a/hw/core/resettable.c b/hw/core/resettable.c
index c3df75c..6dd3e3d 100644
--- a/hw/core/resettable.c
+++ b/hw/core/resettable.c
@@ -48,8 +48,6 @@ void resettable_reset(Object *obj, ResetType type)
void resettable_assert_reset(Object *obj, ResetType type)
{
- /* TODO: change this assert when adding support for other reset types */
- assert(type == RESET_TYPE_COLD);
trace_resettable_reset_assert_begin(obj, type);
assert(!enter_phase_in_progress);
@@ -64,8 +62,6 @@ void resettable_assert_reset(Object *obj, ResetType type)
void resettable_release_reset(Object *obj, ResetType type)
{
- /* TODO: change this assert when adding support for other reset types */
- assert(type == RESET_TYPE_COLD);
trace_resettable_reset_release_begin(obj, type);
assert(!enter_phase_in_progress);
@@ -181,7 +177,7 @@ static void resettable_phase_hold(Object *obj, void *opaque, ResetType type)
trace_resettable_transitional_function(obj, obj_typename);
tr_func(obj);
} else if (rc->phases.hold) {
- rc->phases.hold(obj);
+ rc->phases.hold(obj, type);
}
}
trace_resettable_phase_hold_end(obj, obj_typename, s->count);
@@ -204,7 +200,7 @@ static void resettable_phase_exit(Object *obj, void *opaque, ResetType type)
if (--s->count == 0) {
trace_resettable_phase_exit_exec(obj, obj_typename, !!rc->phases.exit);
if (rc->phases.exit && !resettable_get_tr_func(rc, obj)) {
- rc->phases.exit(obj);
+ rc->phases.exit(obj, type);
}
}
s->exit_phase_in_progress = false;