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| author | Evgeny Iakovlev <eiakovlev@linux.microsoft.com> | 2023-01-23 17:23:03 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-02-03 12:59:22 +0000 |
| commit | 23dcbfc080eb8a8e8395d753f07adbb0ab761143 (patch) | |
| tree | 5e821f12780adcc31902a9da95eecb391a1a9771 /hw/char | |
| parent | 3b7a165e8c94b1f7eee326fa6b68eb45f0324ea1 (diff) | |
| download | qemu-23dcbfc080eb8a8e8395d753f07adbb0ab761143.zip qemu-23dcbfc080eb8a8e8395d753f07adbb0ab761143.tar.gz qemu-23dcbfc080eb8a8e8395d753f07adbb0ab761143.tar.bz2 | |
hw/char/pl011: better handling of FIFO flags on LCR reset
Current FIFO handling code does not reset RXFE/RXFF flags when guest
resets FIFO by writing to UARTLCR register, although internal FIFO state
is reset to 0 read count. Actual guest-visible flag update will happen
only on next data read or write attempt. As a result of that any guest
that expects RXFE flag to be set (and RXFF to be cleared) after resetting
FIFO will never see that happen.
Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230123162304.26254-5-eiakovlev@linux.microsoft.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/char')
| -rw-r--r-- | hw/char/pl011.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/hw/char/pl011.c b/hw/char/pl011.c index ca7537d..c15cb7a 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -92,6 +92,16 @@ static inline unsigned pl011_get_fifo_depth(PL011State *s) return pl011_is_fifo_enabled(s) ? PL011_FIFO_DEPTH : 1; } +static inline void pl011_reset_fifo(PL011State *s) +{ + s->read_count = 0; + s->read_pos = 0; + + /* Reset FIFO flags */ + s->flags &= ~(PL011_FLAG_RXFF | PL011_FLAG_TXFF); + s->flags |= PL011_FLAG_RXFE | PL011_FLAG_TXFE; +} + static uint64_t pl011_read(void *opaque, hwaddr offset, unsigned size) { @@ -239,8 +249,7 @@ static void pl011_write(void *opaque, hwaddr offset, case 11: /* UARTLCR_H */ /* Reset the FIFO state on FIFO enable or disable */ if ((s->lcr ^ value) & 0x10) { - s->read_count = 0; - s->read_pos = 0; + pl011_reset_fifo(s); } if ((s->lcr ^ value) & 0x1) { int break_enable = value & 0x1; @@ -450,12 +459,11 @@ static void pl011_reset(DeviceState *dev) s->ilpr = 0; s->ibrd = 0; s->fbrd = 0; - s->read_pos = 0; - s->read_count = 0; s->read_trigger = 1; s->ifl = 0x12; s->cr = 0x300; - s->flags = 0x90; + s->flags = 0; + pl011_reset_fifo(s); } static void pl011_class_init(ObjectClass *oc, void *data) |