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| author | Paolo Bonzini <pbonzini@redhat.com> | 2024-05-09 11:46:59 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-06-17 09:47:39 +0200 |
| commit | 647690274053a35dbaa2617f01d432d6ba4e76a8 (patch) | |
| tree | 527889242cb06a9bc6073d5cf517b13e9ee024fc /hw/avr/arduino.c | |
| parent | e4e5981daf37146473b30b9219f78796d15320c5 (diff) | |
| download | qemu-647690274053a35dbaa2617f01d432d6ba4e76a8.zip qemu-647690274053a35dbaa2617f01d432d6ba4e76a8.tar.gz qemu-647690274053a35dbaa2617f01d432d6ba4e76a8.tar.bz2 | |
target/i386: convert SHLD/SHRD to new decoder
Use the same flag generation code as SHL and SHR, but use
the existing gen_shiftd_rm_T1 function to compute the result
as well as CC_SRC.
Decoding-wise, SHLD/SHRD by immediate count as a 4 operand
instruction because s->T0 and s->T1 actually occupy three op
slots. The infrastructure used by opcodes in the 0F 3A table
works fine.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/avr/arduino.c')
0 files changed, 0 insertions, 0 deletions