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| author | Havard Skinnemoen <hskinnemoen@google.com> | 2020-09-10 22:20:48 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-14 14:24:15 +0100 |
| commit | e5a7ba8788056d0fb10b9ff587677ba78ca41ce9 (patch) | |
| tree | bceb72d73b8fe2eafbfbb7600e998d9f4f3023e2 /hw/arm | |
| parent | 07fe5bb537d14a867bc0ba7123808b29339a4522 (diff) | |
| download | qemu-e5a7ba8788056d0fb10b9ff587677ba78ca41ce9.zip qemu-e5a7ba8788056d0fb10b9ff587677ba78ca41ce9.tar.gz qemu-e5a7ba8788056d0fb10b9ff587677ba78ca41ce9.tar.bz2 | |
hw/misc: Add NPCM7xx System Global Control Registers device model
Implement a device model for the System Global Control Registers in the
NPCM730 and NPCM750 BMC SoCs.
This is primarily used to enable SMP boot (the boot ROM spins reading
the SCRPAD register) and DDR memory initialization; other registers are
best effort for now.
The reset values of the MDLR and PWRON registers are determined by the
SoC variant (730 vs 750) and board straps respectively.
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200911052101.2602693-2-hskinnemoen@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index bc3a423..4aec9c6 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -355,6 +355,9 @@ config XLNX_VERSAL select VIRTIO_MMIO select UNIMP +config NPCM7XX + bool + config FSL_IMX25 bool select IMX |