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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2016-06-06 16:59:28 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-06-06 16:59:28 +0100
commite40c3d2e7f4b58669a1b4e5dfb684e57c0bf62ce (patch)
tree73e717d197ea19913d07c473c30069cb1fd03bd6 /hw/arm
parent78f1edb19fe11fa0c5d0bf484db59a384f455d3c (diff)
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hw/arm/virt: fix limit of 64-bit ACPI/ECAM PCI MMIO range
Set the MMIO range limit field to 'base + size - 1' as required. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1463856217-17969-1-git-send-email-ard.biesheuvel@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/virt-acpi-build.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 26a7bac..83a5420 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -231,7 +231,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
aml_append(rbuf,
aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
- base_mmio_high, base_mmio_high, 0x0000,
+ base_mmio_high,
+ base_mmio_high + size_mmio_high - 1, 0x0000,
size_mmio_high));
}