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authorCédric Le Goater <clg@kaod.org>2023-03-02 13:57:50 +0100
committerCédric Le Goater <clg@kaod.org>2023-03-02 13:57:50 +0100
commit8b744a6a473015a24d528f480b99faf95da50775 (patch)
treeb969da4fc31231cff9c537345d21faa1c9e1fb8c /hw/arm
parent5aa281d757960ea79190bcfb25294e2499de165e (diff)
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aspeed: Add a boot_rom overlap region in the SoC spi_boot container
To avoid the SPI transactions fetching instructions from the FMC CE0 flash device and speed up boot, a ROM can be created if a drive is available. Reverse the logic to allow a machine to boot without a drive, using a block device instead : -blockdev node-name=fmc0,driver=file,filename=/path/to/flash.img \ -device mx66u51235f,bus=ssi.0,drive=fmc0 Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/aspeed.c47
1 files changed, 27 insertions, 20 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 4a2814b..e261738 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -241,12 +241,9 @@ static void aspeed_reset_secondary(ARMCPU *cpu,
cpu_set_pc(cs, info->smp_loader_start);
}
-#define FIRMWARE_ADDR 0x0
-
-static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
+static void write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size,
Error **errp)
{
- BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
g_autofree void *storage = NULL;
int64_t size;
@@ -272,6 +269,22 @@ static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
}
+/*
+ * Create a ROM and copy the flash contents at the expected address
+ * (0x0). Boots faster than execute-in-place.
+ */
+static void aspeed_install_boot_rom(AspeedSoCState *soc, BlockBackend *blk,
+ uint64_t rom_size)
+{
+ MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
+
+ memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom", rom_size,
+ &error_abort);
+ memory_region_add_subregion_overlap(&soc->spi_boot_container, 0,
+ boot_rom, 1);
+ write_boot_rom(blk, ASPEED_SOC_SPI_BOOT_ADDR, rom_size, &error_abort);
+}
+
void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
unsigned int count, int unit0)
{
@@ -332,7 +345,6 @@ static void aspeed_machine_init(MachineState *machine)
AspeedMachineState *bmc = ASPEED_MACHINE(machine);
AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
AspeedSoCClass *sc;
- DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
int i;
NICInfo *nd = &nd_table[0];
@@ -382,21 +394,6 @@ static void aspeed_machine_init(MachineState *machine)
bmc->spi_model ? bmc->spi_model : amc->spi_model,
1, amc->num_cs);
- /* Install first FMC flash content as a boot rom. */
- if (drive0) {
- AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
- MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
- uint64_t size = memory_region_size(&fl->mmio);
-
- if (!ASPEED_MACHINE(machine)->mmio_exec) {
- memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom",
- size, &error_abort);
- memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
- boot_rom);
- write_boot_rom(drive0, FIRMWARE_ADDR, size, &error_abort);
- }
- }
-
if (machine->kernel_filename && sc->num_cpus > 1) {
/* With no u-boot we must set up a boot stub for the secondary CPU */
MemoryRegion *smpboot = g_new(MemoryRegion, 1);
@@ -427,6 +424,16 @@ static void aspeed_machine_init(MachineState *machine)
drive_get(IF_SD, 0, bmc->soc.sdhci.num_slots));
}
+ if (!bmc->mmio_exec) {
+ DriveInfo *mtd0 = drive_get(IF_MTD, 0, 0);
+
+ if (mtd0) {
+ uint64_t rom_size = memory_region_size(&bmc->soc.spi_boot);
+ aspeed_install_boot_rom(&bmc->soc, blk_by_legacy_dinfo(mtd0),
+ rom_size);
+ }
+ }
+
arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
}