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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-04-26 13:29:12 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-04-30 15:14:15 +0100 |
| commit | 88c756bc9e5d38b6e46e631b9875ae954a319ed9 (patch) | |
| tree | 2e83719e6cfac0be7cd6806fff7d009bab8180db /hw/arm | |
| parent | ee4336f9470b74f4dd3493d1fdbd61ff13005f9d (diff) | |
| download | qemu-88c756bc9e5d38b6e46e631b9875ae954a319ed9.zip qemu-88c756bc9e5d38b6e46e631b9875ae954a319ed9.tar.gz qemu-88c756bc9e5d38b6e46e631b9875ae954a319ed9.tar.bz2 | |
hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property
Currently the sbsa_gdwt watchdog device hardcodes its frequency at
62.5MHz. In real hardware, this watchdog is supposed to be driven
from the system counter, which also drives the CPU generic timers.
Newer CPU types (in particular from Armv8.6) should have a CPU
generic timer frequency of 1GHz, so we can't leave the watchdog
on the old QEMU default of 62.5GHz.
Make the frequency a QOM property so it can be set by the board,
and have our only board that uses this device set that frequency
to the same value it sets the CPU frequency.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240426122913.3427983-4-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/sbsa-ref.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 36f6f71..57c337f 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -543,6 +543,7 @@ static void create_wdt(const SBSAMachineState *sms) SysBusDevice *s = SYS_BUS_DEVICE(dev); int irq = sbsa_ref_irqmap[SBSA_GWDT_WS0]; + qdev_prop_set_uint64(dev, "clock-frequency", SBSA_GTIMER_HZ); sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, rbase); sysbus_mmio_map(s, 1, cbase); |