aboutsummaryrefslogtreecommitdiff
path: root/hw/arm
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2020-10-01 16:41:30 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-10-01 16:41:30 +0100
commit625581c2602b5b43e115b779a9a782478e6f92e7 (patch)
tree0c4125a4d194fe665816717e013ee312f7d5c012 /hw/arm
parentb23317eec4715aa62de9a6e5490a01122c8eef0e (diff)
parentcdfaa57dcb53ba012439765a1462247dfda8595d (diff)
downloadqemu-625581c2602b5b43e115b779a9a782478e6f92e7.zip
qemu-625581c2602b5b43e115b779a9a782478e6f92e7.tar.gz
qemu-625581c2602b5b43e115b779a9a782478e6f92e7.tar.bz2
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201001' into staging
target-arm queue: * Make isar_feature_aa32_fp16_arith() handle M-profile * Fix SVE splice * Fix SVE LDR/STR * Remove ignore_memory_transaction_failures on the raspi2 * raspi: Various cleanup/refactoring # gpg: Signature made Thu 01 Oct 2020 15:46:47 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201001: hw/arm/raspi: Remove use of the 'version' value in the board code hw/arm/raspi: Use RaspiProcessorId to set the firmware load address hw/arm/raspi: Introduce RaspiProcessorId enum hw/arm/raspi: Use more specific machine names hw/arm/raspi: Avoid using TypeInfo::class_data pointer hw/arm/raspi: Move arm_boot_info structure to RaspiMachineState hw/arm/raspi: Load the firmware on the first core hw/arm/raspi: Display the board revision in the machine description hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 hw/arm/bcm2835: Add more unimplemented peripherals hw/arm/raspi: Define various blocks base addresses target/arm: Fix SVE splice target/arm: Fix sve ldr/str target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile target/arm: Add ID register values for Cortex-M0 hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/bcm2835_peripherals.c2
-rw-r--r--hw/arm/raspi.c153
2 files changed, 84 insertions, 71 deletions
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index a9d7f53..15c5c72 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -343,6 +343,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
INTERRUPT_USB));
+ create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
@@ -356,6 +357,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
+ create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
}
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index d2f6745..b5b30f0 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -41,6 +41,7 @@ struct RaspiMachineState {
MachineState parent_obj;
/*< public >*/
BCM283XState soc;
+ struct arm_boot_info binfo;
};
typedef struct RaspiMachineState RaspiMachineState;
@@ -68,51 +69,43 @@ FIELD(REV_CODE, MANUFACTURER, 16, 4);
FIELD(REV_CODE, MEMORY_SIZE, 20, 3);
FIELD(REV_CODE, STYLE, 23, 1);
+typedef enum RaspiProcessorId {
+ PROCESSOR_ID_BCM2836 = 1,
+ PROCESSOR_ID_BCM2837 = 2,
+} RaspiProcessorId;
+
+static const struct {
+ const char *type;
+ int cores_count;
+} soc_property[] = {
+ [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS},
+ [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS},
+};
+
static uint64_t board_ram_size(uint32_t board_rev)
{
assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE);
}
-static int board_processor_id(uint32_t board_rev)
+static RaspiProcessorId board_processor_id(uint32_t board_rev)
{
+ int proc_id = FIELD_EX32(board_rev, REV_CODE, PROCESSOR);
+
assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
- return FIELD_EX32(board_rev, REV_CODE, PROCESSOR);
-}
+ assert(proc_id < ARRAY_SIZE(soc_property) && soc_property[proc_id].type);
-static int board_version(uint32_t board_rev)
-{
- return board_processor_id(board_rev) + 1;
+ return proc_id;
}
static const char *board_soc_type(uint32_t board_rev)
{
- static const char *soc_types[] = {
- NULL, TYPE_BCM2836, TYPE_BCM2837,
- };
- int proc_id = board_processor_id(board_rev);
-
- if (proc_id >= ARRAY_SIZE(soc_types) || !soc_types[proc_id]) {
- error_report("Unsupported processor id '%d' (board revision: 0x%x)",
- proc_id, board_rev);
- exit(1);
- }
- return soc_types[proc_id];
+ return soc_property[board_processor_id(board_rev)].type;
}
static int cores_count(uint32_t board_rev)
{
- static const int soc_cores_count[] = {
- 0, BCM283X_NCPUS, BCM283X_NCPUS,
- };
- int proc_id = board_processor_id(board_rev);
-
- if (proc_id >= ARRAY_SIZE(soc_cores_count) || !soc_cores_count[proc_id]) {
- error_report("Unsupported processor id '%d' (board revision: 0x%x)",
- proc_id, board_rev);
- exit(1);
- }
- return soc_cores_count[proc_id];
+ return soc_property[board_processor_id(board_rev)].cores_count;
}
static const char *board_type(uint32_t board_rev)
@@ -203,44 +196,47 @@ static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
cpu_set_pc(cs, info->smp_loader_start);
}
-static void setup_boot(MachineState *machine, int version, size_t ram_size)
+static void setup_boot(MachineState *machine, RaspiProcessorId processor_id,
+ size_t ram_size)
{
- static struct arm_boot_info binfo;
+ RaspiMachineState *s = RASPI_MACHINE(machine);
int r;
- binfo.board_id = MACH_TYPE_BCM2708;
- binfo.ram_size = ram_size;
- binfo.nb_cpus = machine->smp.cpus;
+ s->binfo.board_id = MACH_TYPE_BCM2708;
+ s->binfo.ram_size = ram_size;
+ s->binfo.nb_cpus = machine->smp.cpus;
- if (version <= 2) {
- /* The rpi1 and 2 require some custom setup code to run in Secure
- * mode before booting a kernel (to set up the SMC vectors so
- * that we get a no-op SMC; this is used by Linux to call the
+ if (processor_id <= PROCESSOR_ID_BCM2836) {
+ /*
+ * The BCM2835 and BCM2836 require some custom setup code to run
+ * in Secure mode before booting a kernel (to set up the SMC vectors
+ * so that we get a no-op SMC; this is used by Linux to call the
* firmware for some cache maintenance operations.
- * The rpi3 doesn't need this.
+ * The BCM2837 doesn't need this.
*/
- binfo.board_setup_addr = BOARDSETUP_ADDR;
- binfo.write_board_setup = write_board_setup;
- binfo.secure_board_setup = true;
- binfo.secure_boot = true;
+ s->binfo.board_setup_addr = BOARDSETUP_ADDR;
+ s->binfo.write_board_setup = write_board_setup;
+ s->binfo.secure_board_setup = true;
+ s->binfo.secure_boot = true;
}
- /* Pi2 and Pi3 requires SMP setup */
- if (version >= 2) {
- binfo.smp_loader_start = SMPBOOT_ADDR;
- if (version == 2) {
- binfo.write_secondary_boot = write_smpboot;
+ /* BCM2836 and BCM2837 requires SMP setup */
+ if (processor_id >= PROCESSOR_ID_BCM2836) {
+ s->binfo.smp_loader_start = SMPBOOT_ADDR;
+ if (processor_id == PROCESSOR_ID_BCM2836) {
+ s->binfo.write_secondary_boot = write_smpboot;
} else {
- binfo.write_secondary_boot = write_smpboot64;
+ s->binfo.write_secondary_boot = write_smpboot64;
}
- binfo.secondary_cpu_reset_hook = reset_secondary;
+ s->binfo.secondary_cpu_reset_hook = reset_secondary;
}
/* If the user specified a "firmware" image (e.g. UEFI), we bypass
* the normal Linux boot process
*/
if (machine->firmware) {
- hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : FIRMWARE_ADDR_2;
+ hwaddr firmware_addr = processor_id <= PROCESSOR_ID_BCM2836
+ ? FIRMWARE_ADDR_2 : FIRMWARE_ADDR_3;
/* load the firmware image (typically kernel.img) */
r = load_image_targphys(machine->firmware, firmware_addr,
ram_size - firmware_addr);
@@ -249,11 +245,11 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
exit(1);
}
- binfo.entry = firmware_addr;
- binfo.firmware_loaded = true;
+ s->binfo.entry = firmware_addr;
+ s->binfo.firmware_loaded = true;
}
- arm_load_kernel(ARM_CPU(first_cpu), machine, &binfo);
+ arm_load_kernel(&s->soc.cpu[0].core, machine, &s->binfo);
}
static void raspi_machine_init(MachineState *machine)
@@ -261,7 +257,6 @@ static void raspi_machine_init(MachineState *machine)
RaspiMachineClass *mc = RASPI_MACHINE_GET_CLASS(machine);
RaspiMachineState *s = RASPI_MACHINE(machine);
uint32_t board_rev = mc->board_rev;
- int version = board_version(board_rev);
uint64_t ram_size = board_ram_size(board_rev);
uint32_t vcram_size;
DriveInfo *di;
@@ -302,17 +297,16 @@ static void raspi_machine_init(MachineState *machine)
vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size",
&error_abort);
- setup_boot(machine, version, machine->ram_size - vcram_size);
+ setup_boot(machine, board_processor_id(mc->board_rev),
+ machine->ram_size - vcram_size);
}
-static void raspi_machine_class_init(ObjectClass *oc, void *data)
+static void raspi_machine_class_common_init(MachineClass *mc,
+ uint32_t board_rev)
{
- MachineClass *mc = MACHINE_CLASS(oc);
- RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
- uint32_t board_rev = (uint32_t)(uintptr_t)data;
-
- rmc->board_rev = board_rev;
- mc->desc = g_strdup_printf("Raspberry Pi %s", board_type(board_rev));
+ mc->desc = g_strdup_printf("Raspberry Pi %s (revision 1.%u)",
+ board_type(board_rev),
+ FIELD_EX32(board_rev, REV_CODE, REVISION));
mc->init = raspi_machine_init;
mc->block_default_type = IF_SD;
mc->no_parallel = 1;
@@ -321,23 +315,40 @@ static void raspi_machine_class_init(ObjectClass *oc, void *data)
mc->default_cpus = mc->min_cpus = mc->max_cpus = cores_count(board_rev);
mc->default_ram_size = board_ram_size(board_rev);
mc->default_ram_id = "ram";
- if (board_version(board_rev) == 2) {
- mc->ignore_memory_transaction_failures = true;
- }
};
+static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
+
+ mc->alias = "raspi2";
+ rmc->board_rev = 0xa21041;
+ raspi_machine_class_common_init(mc, rmc->board_rev);
+};
+
+#ifdef TARGET_AARCH64
+static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
+
+ mc->alias = "raspi3";
+ rmc->board_rev = 0xa02082;
+ raspi_machine_class_common_init(mc, rmc->board_rev);
+};
+#endif /* TARGET_AARCH64 */
+
static const TypeInfo raspi_machine_types[] = {
{
- .name = MACHINE_TYPE_NAME("raspi2"),
+ .name = MACHINE_TYPE_NAME("raspi2b"),
.parent = TYPE_RASPI_MACHINE,
- .class_init = raspi_machine_class_init,
- .class_data = (void *)0xa21041,
+ .class_init = raspi2b_machine_class_init,
#ifdef TARGET_AARCH64
}, {
- .name = MACHINE_TYPE_NAME("raspi3"),
+ .name = MACHINE_TYPE_NAME("raspi3b"),
.parent = TYPE_RASPI_MACHINE,
- .class_init = raspi_machine_class_init,
- .class_data = (void *)0xa02082,
+ .class_init = raspi3b_machine_class_init,
#endif
}, {
.name = TYPE_RASPI_MACHINE,