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| author | Nikita Ostrenkov <n.ostrenkov@gmail.com> | 2024-01-08 14:03:25 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-01-26 12:23:04 +0000 |
| commit | 5e6be95ed1578c7cfac2082b39384d99fd912508 (patch) | |
| tree | 7fcb89aec431a2476ec6483a332de08b224dad83 /hw/arm | |
| parent | ee0a2e3c9d2991a11c13ffadb15e4d0add43c257 (diff) | |
| download | qemu-5e6be95ed1578c7cfac2082b39384d99fd912508.zip qemu-5e6be95ed1578c7cfac2082b39384d99fd912508.tar.gz qemu-5e6be95ed1578c7cfac2082b39384d99fd912508.tar.bz2 | |
hw/arm: add PCIe to Freescale i.MX6
Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com>
Message-id: 20240108140325.1291-1-n.ostrenkov@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/Kconfig | 2 | ||||
| -rw-r--r-- | hw/arm/fsl-imx6.c | 25 |
2 files changed, 27 insertions, 0 deletions
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 2bc3ea3..f927878 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -547,6 +547,7 @@ config FSL_IMX31 config FSL_IMX6 bool + imply PCIE_DEVICES imply I2C_DEVICES select A9MPCORE select IMX @@ -555,6 +556,7 @@ config FSL_IMX6 select IMX_USBPHY select WDT_IMX2 select PL310 # cache controller + select PCI_EXPRESS_DESIGNWARE select SDHCI config ASPEED_SOC diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 42f9058..b7f93d8 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -22,6 +22,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/arm/fsl-imx6.h" +#include "hw/misc/unimp.h" #include "hw/usb/imx-usb-phy.h" #include "hw/boards.h" #include "hw/qdev-properties.h" @@ -103,6 +104,8 @@ static void fsl_imx6_init(Object *obj) object_initialize_child(obj, "eth", &s->eth, TYPE_IMX_ENET); + + object_initialize_child(obj, "pcie", &s->pcie, TYPE_DESIGNWARE_PCIE_HOST); } static void fsl_imx6_realize(DeviceState *dev, Error **errp) @@ -110,6 +113,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) MachineState *ms = MACHINE(qdev_get_machine()); FslIMX6State *s = FSL_IMX6(dev); uint16_t i; + qemu_irq irq; unsigned int smp_cpus = ms->smp.cpus; if (smp_cpus > FSL_IMX6_NUM_CPUS) { @@ -425,6 +429,27 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) FSL_IMX6_WDOGn_IRQ[i])); } + /* + * PCIe + */ + sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX6_PCIe_REG_ADDR); + + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE1_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 0, irq); + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE2_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 1, irq); + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE3_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 2, irq); + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE4_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq); + + /* + * PCIe PHY + */ + create_unimplemented_device("pcie-phy", FSL_IMX6_PCIe_ADDR, + FSL_IMX6_PCIe_SIZE); + /* ROM memory */ if (!memory_region_init_rom(&s->rom, OBJECT(dev), "imx6.rom", FSL_IMX6_ROM_SIZE, errp)) { |