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authorJamin Lin <jamin_lin@aspeedtech.com>2024-06-25 15:07:39 +0800
committerCédric Le Goater <clg@redhat.com>2024-07-02 07:52:43 +0200
commit5c065dfc71b84179a9aec2d283bb57b5a5675b0b (patch)
treee3a321dc8f6950a0c09e87bf2a0f215a3985a12c /hw/arm
parent61578d1e806d7271813c870e31160a7b21eab508 (diff)
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aspeed/soc: Fix possible divide by zero
Coverity reports a possible DIVIDE_BY_ZERO issue regarding the "ram_size" object property. This can not happen because RAM has predefined valid sizes per SoC. Nevertheless, add a test to close the issue. Fixes: Coverity CID 1547113 Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> [ clg: Rewrote commit log ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/aspeed_ast27x0.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index b6876b4..18e6a8b 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -211,6 +211,8 @@ static void aspeed_ram_capacity_write(void *opaque, hwaddr addr, uint64_t data,
ram_size = object_property_get_uint(OBJECT(&s->sdmc), "ram-size",
&error_abort);
+ assert(ram_size > 0);
+
/*
* Emulate ddr capacity hardware behavior.
* If writes the data to the address which is beyond the ram size,