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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-05-18 16:03:07 +0200 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-05-21 22:05:27 +0100 |
commit | 5a0001ec7e0a446b6da86da8ca03211aab0fcd08 (patch) | |
tree | 9e58502cc700236afa57bdf7777647cfbf1c61f2 /hw/arm | |
parent | 9904625f1b54190bc6d9c098c2e0d969e67014cf (diff) | |
download | qemu-5a0001ec7e0a446b6da86da8ca03211aab0fcd08.zip qemu-5a0001ec7e0a446b6da86da8ca03211aab0fcd08.tar.gz qemu-5a0001ec7e0a446b6da86da8ca03211aab0fcd08.tar.bz2 |
hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20200518140309.5220-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r-- | hw/arm/pxa2xx_gpio.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index f8df3cc..a01db54 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -9,7 +9,6 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "hw/hw.h" #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" @@ -199,7 +198,8 @@ static uint64_t pxa2xx_gpio_read(void *opaque, hwaddr offset, return s->status[bank]; default: - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n", + __func__, offset); } return 0; @@ -252,7 +252,8 @@ static void pxa2xx_gpio_write(void *opaque, hwaddr offset, break; default: - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n", + __func__, offset); } } |