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| author | Cédric Le Goater <clg@kaod.org> | 2017-06-02 11:51:49 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-06-02 11:51:49 +0100 |
| commit | 4960f084cfb4d42bb8995dd23ccad168c3e4ad3a (patch) | |
| tree | 1be9bb56884e8f3b5d0ce6f56220eb8b8ce7c0ee /hw/arm | |
| parent | d0efdc1686405c3873703a8617daba54d3fbb75f (diff) | |
| download | qemu-4960f084cfb4d42bb8995dd23ccad168c3e4ad3a.zip qemu-4960f084cfb4d42bb8995dd23ccad168c3e4ad3a.tar.gz qemu-4960f084cfb4d42bb8995dd23ccad168c3e4ad3a.tar.bz2 | |
aspeed/i2c: introduce a state machine
The Aspeed I2C controller maintains a state machine in the command
register, which is mostly used for debug.
Let's start adding a few states to handle abnormal STOP
commands. Today, the model uses the busy status of the bus as a
condition to do so but it is not precise enough.
Also remove the ABNORMAL bit for failing TX commands. This is
incorrect with respect to the specs.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 1494827476-1487-4-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
0 files changed, 0 insertions, 0 deletions