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| author | Luc Michel <luc.michel@greensocs.com> | 2018-08-14 17:17:21 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-14 17:17:21 +0100 |
| commit | 55ef3233586ab7acc3bbd970d4324bee8cc95112 (patch) | |
| tree | 4f11a992e11d42d6229543b3d4122242f9ebec52 /hw/arm/virt-acpi-build.c | |
| parent | 75b749af0c944a416dd5f334fc483f01110c3f5c (diff) | |
| download | qemu-55ef3233586ab7acc3bbd970d4324bee8cc95112.zip qemu-55ef3233586ab7acc3bbd970d4324bee8cc95112.tar.gz qemu-55ef3233586ab7acc3bbd970d4324bee8cc95112.tar.bz2 | |
arm/virt: Add support for GICv2 virtualization extensions
Add support for GICv2 virtualization extensions by mapping the necessary
I/O regions and connecting the maintenance IRQ lines.
Declare those additions in the device tree and in the ACPI tables.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180727095421.386-21-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/virt-acpi-build.c')
| -rw-r--r-- | hw/arm/virt-acpi-build.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 6ea47e2..ce31abd 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -659,6 +659,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) gicc->length = sizeof(*gicc); if (vms->gic_version == 2) { gicc->base_address = cpu_to_le64(memmap[VIRT_GIC_CPU].base); + gicc->gich_base_address = cpu_to_le64(memmap[VIRT_GIC_HYP].base); + gicc->gicv_base_address = cpu_to_le64(memmap[VIRT_GIC_VCPU].base); } gicc->cpu_interface_number = cpu_to_le32(i); gicc->arm_mpidr = cpu_to_le64(armcpu->mp_affinity); @@ -668,8 +670,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) if (arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { gicc->performance_interrupt = cpu_to_le32(PPI(VIRTUAL_PMU_IRQ)); } - if (vms->virt && vms->gic_version == 3) { - gicc->vgic_interrupt = cpu_to_le32(PPI(ARCH_GICV3_MAINT_IRQ)); + if (vms->virt) { + gicc->vgic_interrupt = cpu_to_le32(PPI(ARCH_GIC_MAINT_IRQ)); } } |