aboutsummaryrefslogtreecommitdiff
path: root/hw/arm/npcm7xx.c
diff options
context:
space:
mode:
authorHao Wu <wuhaotsh@google.com>2025-02-19 10:45:54 -0800
committerPeter Maydell <peter.maydell@linaro.org>2025-02-20 14:20:29 +0000
commite9be8467b42f7e2af70694422f4b4d8afe82bf4e (patch)
tree8b968e869ac09ec41ba5c81ff86e74f129748230 /hw/arm/npcm7xx.c
parent269b7effd906d6b22071971b7f5b4cb344403b86 (diff)
downloadqemu-e9be8467b42f7e2af70694422f4b4d8afe82bf4e.zip
qemu-e9be8467b42f7e2af70694422f4b4d8afe82bf4e.tar.gz
qemu-e9be8467b42f7e2af70694422f4b4d8afe82bf4e.tar.bz2
hw/ssi: Make flash size a property in NPCM7XX FIU
This allows different FIUs to have different flash sizes, useful in NPCM8XX which has multiple different sized FIU modules. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Philippe Mathieu-Daude <philmd@linaro.org> Message-id: 20250219184609.1839281-4-wuhaotsh@google.com [PMM: flash_size must be a uint64_t to build on 32-bit hosts] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/npcm7xx.c')
-rw-r--r--hw/arm/npcm7xx.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index 386b2c3..2d6e08b 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -292,17 +292,21 @@ static const struct {
hwaddr regs_addr;
int cs_count;
const hwaddr *flash_addr;
+ size_t flash_size;
} npcm7xx_fiu[] = {
{
.name = "fiu0",
.regs_addr = 0xfb000000,
.cs_count = ARRAY_SIZE(npcm7xx_fiu0_flash_addr),
.flash_addr = npcm7xx_fiu0_flash_addr,
+ .flash_size = 128 * MiB,
+
}, {
.name = "fiu3",
.regs_addr = 0xc0000000,
.cs_count = ARRAY_SIZE(npcm7xx_fiu3_flash_addr),
.flash_addr = npcm7xx_fiu3_flash_addr,
+ .flash_size = 128 * MiB,
},
};
@@ -735,6 +739,8 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
object_property_set_int(OBJECT(sbd), "cs-count",
npcm7xx_fiu[i].cs_count, &error_abort);
+ object_property_set_int(OBJECT(sbd), "flash-size",
+ npcm7xx_fiu[i].flash_size, &error_abort);
sysbus_realize(sbd, &error_abort);
sysbus_mmio_map(sbd, 0, npcm7xx_fiu[i].regs_addr);