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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-07-27 16:12:10 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-07-27 16:12:10 +0100 |
| commit | a6d6f37aed4b171d121cd4a9363fbb41e90dcb53 (patch) | |
| tree | 7e02ec1255a400c1886d88b9845924ae043f1b29 /hw/arm/boot.c | |
| parent | ca05a240d4fa2ce880c630058b635482d3d472f8 (diff) | |
| download | qemu-a6d6f37aed4b171d121cd4a9363fbb41e90dcb53.zip qemu-a6d6f37aed4b171d121cd4a9363fbb41e90dcb53.tar.gz qemu-a6d6f37aed4b171d121cd4a9363fbb41e90dcb53.tar.bz2 | |
target/arm: Always pass cacheattr in S1_ptw_translate
When we changed the interface of get_phys_addr_lpae to require
the cacheattr parameter, this spot was missed. The compiler is
unable to detect the use of NULL vs the nonnull attribute here.
Fixes: 7e98e21c098
Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Jan Kiszka <jan.kiskza@siemens.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/boot.c')
0 files changed, 0 insertions, 0 deletions