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authorSebastian Huber <sebastian.huber@embedded-brains.de>2024-05-24 13:32:56 +0200
committerPeter Maydell <peter.maydell@linaro.org>2024-05-30 13:21:06 +0100
commitd9aff83ad569714ec1b05176942a80fd80e062b7 (patch)
treee7ef8cca49dfba04004bbd4f10a033de7ba4b4b3 /hw/arm/Kconfig
parentf5e328fef057a79ee40a93cdb27bf0de7991973e (diff)
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hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn
According to the GICv2 specification section 4.3.12, "Interrupt Processor Targets Registers, GICD_ITARGETSRn": "Any change to a CPU targets field value: [...] * Has an effect on any pending interrupts. This means: - adding a CPU interface to the target list of a pending interrupt makes that interrupt pending on that CPU interface - removing a CPU interface from the target list of a pending interrupt removes the pending state of that interrupt on that CPU interface." Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Message-id: 20240524113256.8102-3-sebastian.huber@embedded-brains.de Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/Kconfig')
0 files changed, 0 insertions, 0 deletions