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author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2024-10-16 17:40:31 -0300 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-31 13:51:24 +1000 |
commit | 40b44316d817b021df2db9c3a24b75ce89ce69c2 (patch) | |
tree | 434757c63199c038e77dba2c7e8313a9e8045a4d /hw/acpi/aml-build.c | |
parent | df240d66ef38cba9dcc7f9a57e0804471eea86bd (diff) | |
download | qemu-40b44316d817b021df2db9c3a24b75ce89ce69c2.zip qemu-40b44316d817b021df2db9c3a24b75ce89ce69c2.tar.gz qemu-40b44316d817b021df2db9c3a24b75ce89ce69c2.tar.bz2 |
test/qtest: add riscv-iommu-pci tests
To test the RISC-V IOMMU emulation we'll use its PCI representation.
Create a new 'riscv-iommu-pci' libqos device that will be present with
CONFIG_RISCV_IOMMU. This config is only available for RISC-V, so this
device will only be consumed by the RISC-V libqos machine.
Start with basic tests: a PCI sanity check and a reset state register
test. The reset test was taken from the RISC-V IOMMU spec chapter 5.2,
"Reset behavior".
More tests will be added later.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241016204038.649340-8-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/acpi/aml-build.c')
0 files changed, 0 insertions, 0 deletions