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author | Palmer Dabbelt <palmer@sifive.com> | 2019-06-24 01:59:05 -0700 |
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committer | Palmer Dabbelt <palmer@sifive.com> | 2019-06-25 22:31:21 -0700 |
commit | 50fba816cd226001bec3e495c39879deb2fa5432 (patch) | |
tree | 0a8b056c8e90559d6a59fe53c53a8607617c08e4 /fpu | |
parent | 0a13a5b856ebb59dec6d165b87a0ba0e1e2dd952 (diff) | |
download | qemu-50fba816cd226001bec3e495c39879deb2fa5432.zip qemu-50fba816cd226001bec3e495c39879deb2fa5432.tar.gz qemu-50fba816cd226001bec3e495c39879deb2fa5432.tar.bz2 |
RISC-V: Add support for the Zifencei extension
fence.i has been split out of the base ISA as part of the ratification
process. This patch adds a Zifencei argument, which disables the
fence.i instruction.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'fpu')
0 files changed, 0 insertions, 0 deletions