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author | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:55 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:55 +0000 |
commit | 9a31b8d0ad86e12920e01bd4c01516be9f75337e (patch) | |
tree | 4bfa38e30d05d7e64b821c309868dfa1be72af69 /fpu/softfloat-specialize.c.inc | |
parent | a71492f7267490e3cc238fa00662d29a0762fd3a (diff) | |
download | qemu-9a31b8d0ad86e12920e01bd4c01516be9f75337e.zip qemu-9a31b8d0ad86e12920e01bd4c01516be9f75337e.tar.gz qemu-9a31b8d0ad86e12920e01bd4c01516be9f75337e.tar.bz2 |
target/sparc: Set FloatInfZeroNaNRule explicitly
Set the FloatInfZeroNaNRule explicitly for the SPARC target,
so we can remove the ifdef from pickNaNMulAdd().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-10-peter.maydell@linaro.org
Diffstat (limited to 'fpu/softfloat-specialize.c.inc')
-rw-r--r-- | fpu/softfloat-specialize.c.inc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index db9a466..7e57e85 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -489,8 +489,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, /* * Temporarily fall back to ifdef ladder */ -#if defined(TARGET_SPARC) || \ - defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ +#if defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ defined(TARGET_I386) || defined(TARGET_LOONGARCH) /* * For LoongArch systems that conform to IEEE754-2008, the (inf,zero,nan) |