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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-07-24 13:47:57 +0200
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2024-09-13 20:11:13 +0200
commit44e4075bf43aaf8c114f5644e8bf855bb3f854a4 (patch)
tree5f2f0b64adee735ca6d86aca39ad5d83ac860b45 /fpu/softfloat-specialize.c.inc
parent01d01edc9fc4623e93118bc8cb8c69a46d707026 (diff)
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target/cris: Remove the deprecated CRIS target
The CRIS target is deprecated since v9.0 (commit c7bbef40234 "docs: mark CRIS support as deprecated"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-ID: <20240904143603.52934-14-philmd@linaro.org>
Diffstat (limited to 'fpu/softfloat-specialize.c.inc')
-rw-r--r--fpu/softfloat-specialize.c.inc4
1 files changed, 2 insertions, 2 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index 8f3b97d..4e279b9 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -151,8 +151,8 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status)
#else
/*
* This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V,
- * S390, SH4, TriCore, and Xtensa. Our other supported targets,
- * such CRIS, do not have floating-point.
+ * S390, SH4, TriCore, and Xtensa. Our other supported targets
+ * do not have floating-point.
*/
if (snan_bit_is_one(status)) {
/* set all bits other than msb */