diff options
author | Thomas Huth <thuth@redhat.com> | 2024-04-19 10:48:09 +0200 |
---|---|---|
committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2024-05-05 21:02:47 +0100 |
commit | 6b568e3f1dc22e839cd56b47e22c2aa5ece21367 (patch) | |
tree | 920fb2c640f03bedde21b68e825727dc1c00da4c /event-loop-base.c | |
parent | 248f6f62df073a3b4158fd0093863ab885feabb5 (diff) | |
download | qemu-6b568e3f1dc22e839cd56b47e22c2aa5ece21367.zip qemu-6b568e3f1dc22e839cd56b47e22c2aa5ece21367.tar.gz qemu-6b568e3f1dc22e839cd56b47e22c2aa5ece21367.tar.bz2 |
target/sparc/cpu: Rename the CPU models with a "+" in their names
Commit b447378e12 ("qom/object: Limit type names to alphanumerical ...")
cut down the amount of allowed characters for QOM types to a saner set.
The "+" character was meant to be included in this set, so we had to
add a hack there to still allow the legacy names of POWER and Sparc64
CPUs. However, instead of putting such a hack in the common QOM code,
there is a much better place to do this: The sparc_cpu_class_by_name()
function which is used to look up the names of all Sparc CPUs.
Thus let's finally get rid of the "+" in the Sparc CPU names, and provide
backward compatibility for the old names via some simple checks in the
sparc_cpu_class_by_name() function.
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240419084812.504779-2-thuth@redhat.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'event-loop-base.c')
0 files changed, 0 insertions, 0 deletions