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authorStefan Hajnoczi <stefanha@redhat.com>2025-01-13 09:43:48 -0500
committerStefan Hajnoczi <stefanha@redhat.com>2025-01-13 09:43:48 -0500
commite8aa7fdcddfc8589bdc7c973a052e76e8f999455 (patch)
tree203ea3f29d5540ad7a8311aaa4ea37f7a2ac0856 /docs
parentdc26a2cd9cb68152d8528fa907346370d28bd240 (diff)
parent435d260e7ec5ff9c79e3e62f1d66ec82d2d691ae (diff)
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Merge tag 'pull-target-arm-20250113' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm_sysctl: fix extracting 31th bit of val * hw/misc: cast rpm to uint64_t * tests/qtest/boot-serial-test: Improve ASM * target/arm: Move minor arithmetic helpers out of helper.c * target/arm: change default pauth algorithm to impdef # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmeFGuUZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mFPEAChT9DR/+bNSt0Q28TsCv84 # dMMXle7c821NHTNeP/uBQ0i3aopmOJE145wMSoZza8l+EYjOdQwHpinjfu8J/rOS # mJUgAFRcgUoH77+k0p0x1tqKi7+669TznOMOF4RyudKju5SteVyOGgLNjzJlnItq # 3QRBiDTS+qXqAUhgQtzcuY6Xl5M2KA/cpSWYxQf/JPpZMX2c37V8AlSF/1GkLo6Z # 3afrasXUp+U0+03Pe3Ffknzx/LtkLc2hg2LVX8CeqMLRJSA0ohkSwa/xax+2hn+G # 9fKn92IpQOjEFw6qBTBvkerP2hr6yhDFTVFI9v+lsY4bf7tQGIE75HEGZ1EMr26b # LCIPSQvez9exZl/usLGkUq9MWAiEkhBMy99ajwg5X4IhcbS+oyFtH2teYpt9rd9N # 2dVS5qzErN7TCZQza9A7+bt8v5OtbJk2K8Qx9QhMFU/dIUSp0vOA3NwGu+qkciAb # wNdoXT22Hy0czDiQ/ln3aocmwWeVZN4+AxKNoigQhor+5oIR4lMn1P7yAmsCLeL8 # AaLXJdR4aLnYugh23qzv9wf9kAbxRBMvLbsNTKGG00DYQ0xoY4pQ2CmPAJoVVxpU # FjRydG9sC/6sMoJiOoDVpPW003VY2If8r0ObzqUd2gkw1HLf12yug+lij0LkcXKC # Au7ycaoHiTlluNxyQjsgPg== # =FGfo # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Jan 2025 08:53:41 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250113' of https://git.linaro.org/people/pmaydell/qemu-arm: docs/system/arm/virt: mention specific migration information target/arm: change default pauth algorithm to impdef tests/tcg/aarch64: force qarma5 for pauth-3 test target/arm: add new property to select pauth-qarma5 target/arm: Move minor arithmetic helpers out of helper.c tests/qtest/boot-serial-test: Initialize PL011 Control register tests/qtest/boot-serial-test: Reorder pair of instructions in PL011 test tests/qtest/boot-serial-test: Reduce for() loop in PL011 tests tests/qtest/boot-serial-test: Improve ASM comments of PL011 tests hw/misc: cast rpm to uint64_t hw/arm_sysctl: fix extracting 31th bit of val Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'docs')
-rw-r--r--docs/system/arm/cpu-features.rst7
-rw-r--r--docs/system/arm/virt.rst4
-rw-r--r--docs/system/introduction.rst2
3 files changed, 10 insertions, 3 deletions
diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst
index a5fb929..37d5dfd 100644
--- a/docs/system/arm/cpu-features.rst
+++ b/docs/system/arm/cpu-features.rst
@@ -219,8 +219,11 @@ Below is the list of TCG VCPU features and their descriptions.
``pauth-qarma3``
When ``pauth`` is enabled, select the architected QARMA3 algorithm.
-Without either ``pauth-impdef`` or ``pauth-qarma3`` enabled,
-the architected QARMA5 algorithm is used. The architected QARMA5
+``pauth-qarma5``
+ When ``pauth`` is enabled, select the architected QARMA5 algorithm.
+
+Without ``pauth-impdef``, ``pauth-qarma3`` or ``pauth-qarma5`` enabled,
+the QEMU impdef algorithm is used. The architected QARMA5
and QARMA3 algorithms have good cryptographic properties, but can
be quite slow to emulate. The impdef algorithm used by QEMU is
non-cryptographic but significantly faster.
diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
index f87adeb..766a745 100644
--- a/docs/system/arm/virt.rst
+++ b/docs/system/arm/virt.rst
@@ -19,6 +19,10 @@ of the 5.0 release and ``virt-5.0`` of the 5.1 release. Migration
is not guaranteed to work between different QEMU releases for
the non-versioned ``virt`` machine type.
+VM migration is not guaranteed when using ``-cpu max``, as features
+supported may change between QEMU versions. To ensure your VM can be
+migrated, it is recommended to use another cpu model instead.
+
Supported devices
"""""""""""""""""
diff --git a/docs/system/introduction.rst b/docs/system/introduction.rst
index 746707e..338d374 100644
--- a/docs/system/introduction.rst
+++ b/docs/system/introduction.rst
@@ -169,7 +169,7 @@ would default to it anyway.
.. code::
- -cpu max,pauth-impdef=on \
+ -cpu max \
-smp 4 \
-accel tcg \