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| author | Arnaud Minier <arnaud.minier@telecom-paris.fr> | 2024-03-03 15:06:36 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-03-05 13:22:55 +0000 |
| commit | d6b55a0fe9920b46d380f50d7da48ff43de21324 (patch) | |
| tree | 5c87fd762ebb17be5eb41aa6c91716667f462f9e /docs | |
| parent | f576e0733ccb023cde94acc7897c78a4871a09d0 (diff) | |
| download | qemu-d6b55a0fe9920b46d380f50d7da48ff43de21324.zip qemu-d6b55a0fe9920b46d380f50d7da48ff43de21324.tar.gz qemu-d6b55a0fe9920b46d380f50d7da48ff43de21324.tar.bz2 | |
hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton
Add the necessary files to add a simple RCC implementation with just
reads from and writes to registers. Also instantiate the RCC in the
STM32L4x5_SoC. It is needed for accurate emulation of all the SoC
clocks and timers.
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240303140643.81957-2-arnaud.minier@telecom-paris.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/system/arm/b-l475e-iot01a.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/system/arm/b-l475e-iot01a.rst b/docs/system/arm/b-l475e-iot01a.rst index 1a021b3..b857a56 100644 --- a/docs/system/arm/b-l475e-iot01a.rst +++ b/docs/system/arm/b-l475e-iot01a.rst @@ -17,13 +17,13 @@ Currently B-L475E-IOT01A machine's only supports the following devices: - Cortex-M4F based STM32L4x5 SoC - STM32L4x5 EXTI (Extended interrupts and events controller) - STM32L4x5 SYSCFG (System configuration controller) +- STM32L4x5 RCC (Reset and clock control) Missing devices """"""""""""""" The B-L475E-IOT01A does *not* support the following devices: -- Reset and clock control (RCC) - Serial ports (UART) - General-purpose I/Os (GPIO) - Analog to Digital Converter (ADC) |