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authorPeter Maydell <peter.maydell@linaro.org>2023-03-21 14:09:34 +0000
committerPeter Maydell <peter.maydell@linaro.org>2023-03-21 14:09:34 +0000
commit8de6e6e12e623ea402274d4cf24de20ed7e40717 (patch)
treecff4fa0dd52eb546af35b3c23221a6d3a6000e5e /docs
parent42d55ab1706912bd21c916dc818279f113ae2791 (diff)
parent5787d17a42f7af4bd117e5d6bfa54b1fdf93c255 (diff)
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Merge tag 'pull-target-arm-20230321' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * contrib/elf2dmp: Support Windows Server 2022 * hw/char/cadence_uart: Fix guards on invalid BRGR/BDIV settings * target/arm: Add Neoverse-N1 IMPDEF registers * hw/usb/imx: Fix out of bounds access in imx_usbphy_read() * docs/system/arm/cpu-features.rst: Fix formatting * target/arm: Don't advertise aarch64-pauth.xml to gdb # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmQZrwQZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gmFD/9Ib/G7f21IQkhi0d0MoJeQ # 529QbzHbXH272OvO2zFdev98o6EVbbeGzGqgaa0lv6OASwvNUIFVJAwZUX6Bb756 # dJ9k5aS2249SGQ8AzM65bCL4HxSVFan5+t9P890SyQk3zIzzQtSVjci/K2P2cFx1 # bKzbCZys/qjZgncPaPeuc9irkmAKlqc9UwqgUV3xvhBAfq1eFHk/bVIhcTVxNwUy # quCYOt1GwtsOKn+nUcKclOcmBb7diCu6iFCGlO7XF9Rjaa+egW3OhUnGqUFROsdu # j4drjeQT8gWY92m8PlnsZb0YUeefAwD7iVZGIAEp3G+9GEXdOvotrQVKtMLMZkq0 # /YInUjYAFu1w7DqhelvSYGVoVioP13HxsFWpmKNYNSJIHtS7QCfmHfUBPQnWjHD5 # XUO/K7vbsp69yi/rDDoHvQ3sqxJUuiF1Wuyj+hRK1JXRhLkRL+tBE7urlqqoJ1wH # 0vL6oNj5GdvNJssIkb7yXx72irgAUu8XTC7bEvGCVfaylmei3SsS35qQmGePzO/z # ok7WePQ/tM/FJ8JLVTXur9YsG7EqMROdszQRE4Yla3NE6BOr7HCCj7ZdCfy5SXL4 # IlZ69UELcYghcfIDRrRLXDSdfs98voRxIRDHy0rz64hUHlLBOnfqw/dcHvZBAB09 # CV7QPcDOR87jY228DT4EzA== # =D7pq # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Mar 2023 13:20:04 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20230321' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Don't advertise aarch64-pauth.xml to gdb docs/system/arm/cpu-features.rst: Fix formatting hw/usb/imx: Fix out of bounds access in imx_usbphy_read() contrib/elf2dmp: add PE name check and Windows Server 2022 support contrib/elf2dmp: move PE dir search to pe_get_data_dir_entry contrib/elf2dmp: fix code style hw/char/cadence_uart: Fix guards on invalid BRGR/BDIV settings target/arm: Add Neoverse-N1 registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs')
-rw-r--r--docs/system/arm/cpu-features.rst76
1 files changed, 34 insertions, 42 deletions
diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst
index 00c4440..f4524b6 100644
--- a/docs/system/arm/cpu-features.rst
+++ b/docs/system/arm/cpu-features.rst
@@ -177,39 +177,32 @@ are named with the prefix "kvm-". KVM VCPU features may be probed,
enabled, and disabled in the same way as other CPU features. Below is
the list of KVM VCPU features and their descriptions.
- kvm-no-adjvtime By default kvm-no-adjvtime is disabled. This
- means that by default the virtual time
- adjustment is enabled (vtime is not *not*
- adjusted).
-
- When virtual time adjustment is enabled each
- time the VM transitions back to running state
- the VCPU's virtual counter is updated to ensure
- stopped time is not counted. This avoids time
- jumps surprising guest OSes and applications,
- as long as they use the virtual counter for
- timekeeping. However it has the side effect of
- the virtual and physical counters diverging.
- All timekeeping based on the virtual counter
- will appear to lag behind any timekeeping that
- does not subtract VM stopped time. The guest
- may resynchronize its virtual counter with
- other time sources as needed.
-
- Enable kvm-no-adjvtime to disable virtual time
- adjustment, also restoring the legacy (pre-5.0)
- behavior.
-
- kvm-steal-time Since v5.2, kvm-steal-time is enabled by
- default when KVM is enabled, the feature is
- supported, and the guest is 64-bit.
-
- When kvm-steal-time is enabled a 64-bit guest
- can account for time its CPUs were not running
- due to the host not scheduling the corresponding
- VCPU threads. The accounting statistics may
- influence the guest scheduler behavior and/or be
- exposed to the guest userspace.
+``kvm-no-adjvtime``
+ By default kvm-no-adjvtime is disabled. This means that by default
+ the virtual time adjustment is enabled (vtime is not *not* adjusted).
+
+ When virtual time adjustment is enabled each time the VM transitions
+ back to running state the VCPU's virtual counter is updated to
+ ensure stopped time is not counted. This avoids time jumps
+ surprising guest OSes and applications, as long as they use the
+ virtual counter for timekeeping. However it has the side effect of
+ the virtual and physical counters diverging. All timekeeping based
+ on the virtual counter will appear to lag behind any timekeeping
+ that does not subtract VM stopped time. The guest may resynchronize
+ its virtual counter with other time sources as needed.
+
+ Enable kvm-no-adjvtime to disable virtual time adjustment, also
+ restoring the legacy (pre-5.0) behavior.
+
+``kvm-steal-time``
+ Since v5.2, kvm-steal-time is enabled by default when KVM is
+ enabled, the feature is supported, and the guest is 64-bit.
+
+ When kvm-steal-time is enabled a 64-bit guest can account for time
+ its CPUs were not running due to the host not scheduling the
+ corresponding VCPU threads. The accounting statistics may influence
+ the guest scheduler behavior and/or be exposed to the guest
+ userspace.
TCG VCPU Features
=================
@@ -217,16 +210,15 @@ TCG VCPU Features
TCG VCPU features are CPU features that are specific to TCG.
Below is the list of TCG VCPU features and their descriptions.
- pauth-impdef When ``FEAT_Pauth`` is enabled, either the
- *impdef* (Implementation Defined) algorithm
- is enabled or the *architected* QARMA algorithm
- is enabled. By default the impdef algorithm
- is disabled, and QARMA is enabled.
+``pauth-impdef``
+ When ``FEAT_Pauth`` is enabled, either the *impdef* (Implementation
+ Defined) algorithm is enabled or the *architected* QARMA algorithm
+ is enabled. By default the impdef algorithm is disabled, and QARMA
+ is enabled.
- The architected QARMA algorithm has good
- cryptographic properties, but can be quite slow
- to emulate. The impdef algorithm used by QEMU
- is non-cryptographic but significantly faster.
+ The architected QARMA algorithm has good cryptographic properties,
+ but can be quite slow to emulate. The impdef algorithm used by QEMU
+ is non-cryptographic but significantly faster.
SVE CPU Properties
==================