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author | Peter Maydell <peter.maydell@linaro.org> | 2022-08-11 14:11:27 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2022-08-12 11:17:35 +0100 |
commit | 2daf518dd1312be8405b4cb094cc7a9720428609 (patch) | |
tree | 8b1292db9065fdf96b1a6a4aeae3281d777483a2 /docs | |
parent | a6b1c53e79d08a99a28cc3e67a3e1a7c34102d6b (diff) | |
download | qemu-2daf518dd1312be8405b4cb094cc7a9720428609.zip qemu-2daf518dd1312be8405b4cb094cc7a9720428609.tar.gz qemu-2daf518dd1312be8405b4cb094cc7a9720428609.tar.bz2 |
target/arm: Don't report Statistical Profiling Extension in ID registers
The newly added neoverse-n1 CPU has ID register values which indicate
the presence of the Statistical Profiling Extension, because the real
hardware has this feature. QEMU's TCG emulation does not yet
implement SPE, though (not even as a minimal stub implementation), so
guests will crash if they try to use it because the SPE system
registers don't exist.
Force ID_AA64DFR0_EL1.PMSVer to 0 in CPU realize for TCG, so that
we don't advertise to the guest a feature that doesn't exist.
(We could alternatively do this by editing the value that
aarch64_neoverse_n1_initfn() sets for this ID register, but
suppressing the field in realize means we won't re-introduce this bug
when we add other CPUs that have SPE in hardware, such as the
Neoverse-V1.)
An example of a non-booting guest is current mainline Linux (5.19),
when booting in EL2 on the virt board (ie with -machine
virtualization=on).
Reported-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Message-id: 20220811131127.947334-1-peter.maydell@linaro.org
Diffstat (limited to 'docs')
0 files changed, 0 insertions, 0 deletions