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authorPeter Maydell <peter.maydell@linaro.org>2024-02-08 16:08:42 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-02-08 16:08:42 +0000
commit03e4bc0bc02779fdf6f8e8d83197f05e70881abf (patch)
treef18a574be493cd5fc294eac8b9db3270e244e05c /docs
parent9e34f127f419b3941b36dfdfac79640dc81e97e2 (diff)
parent23c5692abc3917151dee36c00d751cf5bc46ef19 (diff)
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Merge tag 'pull-tcg-20240205-2' of https://gitlab.com/rth7680/qemu into staging
tcg: Introduce TCG_COND_TST{EQ,NE} target/alpha: Use TCG_COND_TST{EQ,NE} target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} target/s390x: Improve general case of disas_jcc # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmXBpTAdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/p6gf9HAasTSRECk2cvjW9 # /mcJy0AIaespnI50fG8fm48OoFl0847CdrsJycpZ1spw3W3Wb0cVbMbq/teNMjXZ # 0SGQJFk9Baq7wMhW7VzhSzJ96pcorpQprp7XBMdheLXqpT4zsM/EuwEAepBk8RUG # 3kCeo38dswXE681ZafZkd/8pPzII19sQK8eiMpceeYkBsbbep+DDcnE18Ee4kISS # u0SbuslKVahxd86LKuzrcz0pNFcmFuR5jRP9hmbQ0MfeAn0Pxlndi+ayZNghfgPf # 3hDjskiionFwxb/OoRj45BssTWfDiluWl7IUsHfegPXCQ2Y+woT5Vq6TVGZn0GqS # c6RLQQ== # =TMiE # -----END PGP SIGNATURE----- # gpg: Signature made Tue 06 Feb 2024 03:19:12 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20240205-2' of https://gitlab.com/rth7680/qemu: (39 commits) tcg/tci: Support TCG_COND_TST{EQ,NE} tcg/s390x: Support TCG_COND_TST{EQ,NE} tcg/s390x: Add TCG_CT_CONST_CMP tcg/s390x: Split constraint A into J+U tcg/ppc: Support TCG_COND_TST{EQ,NE} tcg/ppc: Add TCG_CT_CONST_CMP tcg/ppc: Tidy up tcg_target_const_match tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc tcg/sparc64: Support TCG_COND_TST{EQ,NE} tcg/sparc64: Pass TCGCond to tcg_out_cmp tcg/sparc64: Hoist read of tcg_cond_to_rcond tcg/i386: Use TEST r,r to test 8/16/32 bits tcg/i386: Improve TSTNE/TESTEQ vs powers of two tcg/i386: Support TCG_COND_TST{EQ,NE} tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp tcg/i386: Pass x86 condition codes to tcg_out_cmov tcg/arm: Support TCG_COND_TST{EQ,NE} tcg/arm: Split out tcg_out_cmp() tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs')
-rw-r--r--docs/devel/tcg-ops.rst2
1 files changed, 2 insertions, 0 deletions
diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
index 8ae59ea..d46b625 100644
--- a/docs/devel/tcg-ops.rst
+++ b/docs/devel/tcg-ops.rst
@@ -253,6 +253,8 @@ Jumps/Labels
| ``TCG_COND_GEU /* unsigned */``
| ``TCG_COND_LEU /* unsigned */``
| ``TCG_COND_GTU /* unsigned */``
+ | ``TCG_COND_TSTEQ /* t1 & t2 == 0 */``
+ | ``TCG_COND_TSTNE /* t1 & t2 != 0 */``
Arithmetic
----------