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author | Phil Dennis-Jordan <phil@philjordan.eu> | 2024-06-05 13:25:50 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-06-08 10:33:38 +0200 |
commit | 9c267239c7a307645849139389b42641655b7ece (patch) | |
tree | 7c68d94be96afb85aa87cf6bd50470af155b0496 /docs/pcie_sriov.txt | |
parent | fcce5287c009770d74f289185eadd6163a1b6a4b (diff) | |
download | qemu-9c267239c7a307645849139389b42641655b7ece.zip qemu-9c267239c7a307645849139389b42641655b7ece.tar.gz qemu-9c267239c7a307645849139389b42641655b7ece.tar.bz2 |
i386/hvf: Adds support for INVTSC cpuid bit
This patch adds the INVTSC bit to the Hypervisor.framework accelerator's
CPUID bit passthrough allow-list. Previously, specifying +invtsc in the CPU
configuration would fail with the following warning despite the host CPU
advertising the feature:
qemu-system-x86_64: warning: host doesn't support requested feature:
CPUID.80000007H:EDX.invtsc [bit 8]
x86 macOS itself relies on a fixed rate TSC for its own Mach absolute time
timestamp mechanism, so there's no reason we can't enable this bit for guests.
When the feature is enabled, a migration blocker is installed.
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
Reviewed-by: Roman Bolshakov <roman@roolebo.dev>
Tested-by: Roman Bolshakov <roman@roolebo.dev>
Message-ID: <20240605112556.43193-2-phil@philjordan.eu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'docs/pcie_sriov.txt')
0 files changed, 0 insertions, 0 deletions