diff options
| author | Stefan Pejic <stefan.pejic@syrmia.com> | 2022-05-04 13:04:02 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-06-11 11:36:01 +0200 |
| commit | f1663114dfb452acd2abd6585f66779ef6a84010 (patch) | |
| tree | 6eac52adb373c177e6454798abfad1dd87c1e2db /docs/about/deprecated.rst | |
| parent | db7596989a67a8f838416f687431f3a0ccb181a0 (diff) | |
| download | qemu-f1663114dfb452acd2abd6585f66779ef6a84010.zip qemu-f1663114dfb452acd2abd6585f66779ef6a84010.tar.gz qemu-f1663114dfb452acd2abd6585f66779ef6a84010.tar.bz2 | |
target/mips: Add missing default cases for some nanoMIPS pools
Switch statements for the code segments that handle nanoMIPS
instruction pools P.LL, P.SC, P.SHIFT, P.LS.S1, P.LS.E0, PP.LSXS
do not have proper default case, resulting in not generating
reserved instruction exception for certain illegal opcodes.
Fix this by adding default cases for these switch statements that
trigger reserved instruction exception.
Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-7-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'docs/about/deprecated.rst')
0 files changed, 0 insertions, 0 deletions