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author | David Gibson <david@gibson.dropbear.id.au> | 2012-12-03 16:42:14 +0000 |
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committer | Alexander Graf <agraf@suse.de> | 2012-12-14 13:12:57 +0100 |
commit | b162d02e9450201c656edce290f33994a6d2ad33 (patch) | |
tree | f92b44cda712d8f3a8a9496f3c7acd2617ea1b73 /cutils.c | |
parent | 9e2c12988bebca7b99c0cd064b23fb7ea6643c86 (diff) | |
download | qemu-b162d02e9450201c656edce290f33994a6d2ad33.zip qemu-b162d02e9450201c656edce290f33994a6d2ad33.tar.gz qemu-b162d02e9450201c656edce290f33994a6d2ad33.tar.bz2 |
target-ppc: Don't use hwaddr to represent hardware state
The hwaddr type is somewhat vaguely defined as being able to contain bus
addresses on the widest possible bus in the system. For that reason it's
discouraged for representing specific pieces of persistent hardware state,
which should instead use an explicit width type that matches the bits
available in real hardware. In particular, because of the possibility that
the size of hwaddr might change if different buses are added to the target
in future, it's not suitable for use in vm state descriptions for savevm
and migration.
This patch purges such unwise uses of hwaddr from the ppc target code,
which turns out to be just one. The ppcemb_tlb_t struct, used on a number
of embedded ppc models to represent a TLB entry contains a hwaddr for the
real address field. This patch changes it to be a fixed uint64_t which is
suitable enough for all machine types which use this structure.
Other uses of hwaddr in CPUPPCState turn out not to be problematic:
htab_base and htab_mask are just used for the convenience of the TCG code;
the underlying machine state is the SDR1 register, which is stored with
a suitable type already. Likewise the mpic_cpu_base field is only used
internally and does not represent fundamental hardware state which needs to
be saved.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'cutils.c')
0 files changed, 0 insertions, 0 deletions