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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-03-02 10:45:37 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-03-02 11:03:45 +0000 |
| commit | 38e2a77c9d6876e58f45cabb1dd9a6a60c22b39e (patch) | |
| tree | 908f106e172aa7d9a259b72900d17770339b4cf2 /cpus.c | |
| parent | c60c1b0d5af1a3568922611afc8a9d9bce31c200 (diff) | |
| download | qemu-38e2a77c9d6876e58f45cabb1dd9a6a60c22b39e.zip qemu-38e2a77c9d6876e58f45cabb1dd9a6a60c22b39e.tar.gz qemu-38e2a77c9d6876e58f45cabb1dd9a6a60c22b39e.tar.bz2 | |
target/arm: Define init-svtor property for the reset secure VTOR value
The Cortex-M33 allows the system to specify the reset value of the
secure Vector Table Offset Register (VTOR) by asserting config
signals. In particular, guest images for the MPS2 AN505 board rely
on the MPS2's initial VTOR being correct for that board.
Implement a QEMU property so board and SoC code can set the reset
value to the correct value.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180220180325.29818-7-peter.maydell@linaro.org
Diffstat (limited to 'cpus.c')
0 files changed, 0 insertions, 0 deletions